構造記述函數에 의한 組合回路의 테스트 제너레이션에 關한 硏究

尹賢植 충주대학교 1983 한국교통대학교 논문집 Vol.16 No.1

This paper presents a method for generating tests for combinational circuits form tructure description functions(SDF) that represent the circuit structure and its gical function. The SDF, Called and “Equivalent Fanout-free From(EFF)”, defined and an algorithm for deriving the EFF is presented, A “path difference” defined as an efficient tool for generating tests. And a necessary and sufficient edition for a path to be sensitized is given by using the path difference. e relation between the path difference and Boolean difference is also shown. Finally ne experimental results are presented.

페이지 기억체계를 지닌 데이타흐름구조의 설계

윤현식 忠州大學校 1986 한국교통대학교 논문집 Vol.20 No.1

The paper presents a data flow architecture with a paged memory system to hold both data flow programs and data structures. The token labeling mechenism is coupled with the memory management system in order to provide for each token a unique memory location. The instruction format allows instructions with multiple operands and multiple destinations for each result Data structures are held in memory while pointers to the structures are circulating as tokens.

마이크로 프로세서用 가상기억체제에 關한 硏究

尹賢植 忠州大學校 1985 한국교통대학교 논문집 Vol.19 No.1

This thesis introduces a virtual memory system which may be connected to the memory bus of a host computer. The sistem is based on the use of a separate processor to interface to the auxiliary memory and perform all the processing related to manging the virtual memory. The proposed approach provides a virtual memory that is transparent to the host processer, with one exception. When a memory reference generated by the host result in a pag efault, a long delay is encountered. This delay corresponds to the time taken by the virtual memory controller to carry outa page transfer. Bubble memory devices are used to implement the auxiliary memory. The suitability of bubble memories in this environment is discussed in the thesis.

最小테스트數를 要하는 論理回路의 實現에 關한 硏究

尹賢植 忠州大學校 1982 한국교통대학교 논문집 Vol.15 No.1

This paper is an investigation of the design of combinational logic circuits which require a minimal number of fault detection tests. Based on the path sensitizing concepts, the patterns for the primary input gates of the network are defined, and then it is shown that, arranging these predefined test patterns according to the path sensitizing characteristics of the given network structures, the minimal complete test sets for fan-out free combinational networks can be found easily. It is also shown that, taking into account the fanout paths sensitizing compatibility, the proposed method can be extended to the irredundant reconvergent fan-out networks.

잉여수계 신경망의 고속 연산 알고리즘에 관한 연구

尹賢植 忠州大學校 1998 한국교통대학교 논문집 Vol.33 No.2

We propose a design algorithm for fast computation and shrinking the hardware size of the sigmoid function generator in digital neural networks(DNN). Because the DNN is composed of massive distributed parallelism and a lot of data buses, it needs a high speed processors and small hardware structure in the same time. The proposed algorithm is superior to the digital neural network system with floating point processing structure in the same conditions. From the results of computer simulation, Look-up table should be taken larger size in order to converging target error under 10??, because accuracy of neural network applications decide modulo and in that case, sigmoid function values in the look-up table are changed with I/O values and error degrees. The proposed algorithm is avaliable to the pattern recognition field for the merit of residue number system.

시스톨릭 어레이 프로세서에 의한 인공신경회로망의 구현

尹賢植 忠州大學校 1991 한국교통대학교 논문집 Vol.25 No.-

In this paper, back-propagation neural network using systolic array processor is presented. The proposed design is based on the classical systolic algorithm of matrix-by-vecter multiplication. Systolic array circuit architecture with Residue Number System is suggested to realize the efficient arithmetic circuit for matrix-by-vector multiplication and computing sigmoid function. This method of design shows that the speed of parallel processing is high and the hardware structure is simple.

디지탈 神經回路網 設計에 관한 硏究

尹賢植 충주대학교 1992 한국교통대학교 논문집 Vol.26 No.-

In this paper, we will present an array processor for the implementation of digital neural networks. Back-propagation model can be formulated as a consecutive matrix-vector multiplication problem with some prespecified thresholding operation. This structure suited for the design of array processor, because the operation procedure can be recursively and repeatedly executed. Systolic array circuit architecture with Residue Number System is suggested to realize the efficient arithmetic circuit for matrix-vector multiplication and computing sigmoid function. The proposed design method expected to adopt for application field of neural networks because it can be realized to currently developed VLSI technology.

U-Healthcare 시스템을 위한 6LoWPAN에 관한 연구

윤현식 忠州大學校 2010 한국교통대학교 논문집 Vol.45 No.-

IEEE 802.15.4 is the standard wireless link technology for low power, low cost, low data-rate, but long lifetime applications including wireless sensor network (WSN). Currently, whether or not IP architecture should be used in WSN over its 802.15.4 link is under dispute. One view is that IP architecture is not suitable for WSN; instead ad hoc network architecture is more preferred to be designed specifically for it. In contrast, IP architecture is seen more as an opportunity for WSNs, even some extra overhead is tolerable taking into consideration the benefits it will bring; and it is also argued that such overheads may actually be minimized through optimization. Such kind of arguments may last for a long time without some convincing experimental measurements of real case performances of IP over 802.15.4 implementation, and thus prevent the advance of related research. In RFC4944, IETF proposed the 6LoWPAN specification to enable IPv6 communication over low power, wireless personal area networks. Since then, we see a great demand and value of making an evaluation of this specification. In this paper, we carry out a performance evaluation of 6LoWPAN on the memory footprint, network capability, transmission delay, and routing cost using a Berkeley 6LoWPAN implementation, b6LoWPAN, on Tmote Sky running TinyOS 2.1. We try to alleviate the dispute and make the direction clearer to the community so as to promote further valuable research in this topic.

애드혹 시스템을 위한 비디오 스트리밍에 관한 연구

윤현식 忠州大學校 2007 한국교통대학교 논문집 Vol.42 No.-

Now-a-days, wireless communication network technology has created variety types of advanced wireless systems. This paper accomplishes the research of Ad-Hoc wireless networks technology to apply wireless multimedia streaming services. specially, to introduce embedded multimedia streaming system. The result of study in this paper will provide the more efficient streaming video and audio services in the field of Ad-Hoc wireless networks.

도시지역 합류식 하수관거 월류수의 오염부하 특성

윤현식,이두진,이영대 漢陽大學校 環境科學硏究所 2003 環境科學論文集 Vol.24 No.-

합류식 하수관거 월류수(Combined sewer overflow, CSOs)는 도시 인근 방류선 수체의 주요한 오염원의 하나로 알려져 있으며, 특히 강우초기 월류수의 경우 높은 오염부하가 일시에 방류되어 심각한 문제를 야기시킨다. 본 연구에서는 도시지역 합류식 하수관거 월류수의 발생 및 오염부하 특성을 분석하고, 초기강우에 의한 세척효과, 오염원 기여도 평가 등을 수행하였다. 강우사상에 따라 다소 차이가 있었으나, 합류식 하수관거 월류수가 건기하수에 비하여 오염부하가 전반적으로 높았으며, 특히 월류초기에는 매우 고농도로 측정되었다. 근사적인 오염물질 수지식을 통하여 관거퇴적물의 재부유에 의한 오염기여도가 가장 높았다. 무차원 L(V)곡선이 초기세척현상(First flush)을 잘 표현하였으며 SS, CODcr, T-P, T-N의 순으로 초기세척효과가 크게 나타났다. Combined sewer overflows(CSOs) have been considered as a major cause of water quality deterioration of natural water-courses in the vicinity of the heavily urbanized areas. The factors defining the magnitude and occurrence of CSOs are site specific. It is important to know exact properties of pollutants contained in CSOs to address water quality impacts that are caused by CSOs inputs to the receiving waters. This should be accompanied with an integrated analysis, evaluation programs, thus allowing us to an appropriate technology to alleviate the impacts. Pollutant concentrations measured during the storm events were generally higher than those of dry weather conditions except for T-N parameter and observed significant higher concentrations at the initial phase of CSOs. Based on the rough estimation by the proposed pollutant mass balance, it was found that a main part of wet weather pollutional loads originates from the resuspension of sewer bottom sediments. The dimensionless L(V) curves for determining whether first flush phenomenon occur or not were well described the pollutant flushing. These results show that a given fraction of volume contains a load of SS higher than CODcr, T-P, T-N in the initial phase of wet weather runoff.