In this paper, back-propagation neural network using systolic array processor is presented. The proposed design is based on the classical systolic algorithm of matrix-by-vecter multiplication.
Systolic array circuit architecture with Residue Number ...
In this paper, back-propagation neural network using systolic array processor is presented. The proposed design is based on the classical systolic algorithm of matrix-by-vecter multiplication.
Systolic array circuit architecture with Residue Number System is suggested to realize the efficient arithmetic circuit for matrix-by-vector multiplication and computing sigmoid function. This method of design shows that the speed of parallel processing is high and the hardware structure is simple.