디지탈 神經回路網 設計에 관한 硏究 = A Study on the Design of Digital Neural Network

다국어 초록 (Multilingual Abstract)

In this paper, we will present an array processor for the implementation of digital neural networks. Back-propagation model can be formulated as a consecutive matrix-vector multiplication problem with some prespecified thresholding operation. This structure suited for the design of array processor, because the operation procedure can be recursively and repeatedly executed.
Systolic array circuit architecture with Residue Number System is suggested to realize the efficient arithmetic circuit for matrix-vector multiplication and computing sigmoid function.
The proposed design method expected to adopt for application field of neural networks because it can be realized to currently developed VLSI technology.