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그래픽 프로세싱 유닛의 균형적인 레지스터 뱅크 근접을 위한 트위스트 뱅크 아비트레이터
정은비(Eunbi Jeong),정이품(Ipoom Jeong),윤명국(Myung Kuk Yoon) 대한전자공학회 2024 대한전자공학회 학술대회 Vol.2024 No.6
Register files on graphics processing units (GPUs) consume a large amount of energy and thus become a critical component for optimizing GPU energy consumption and performancee. In this paper, we tackle the register file underutilization problem caused by imbalanced accesses across different register banks and propose a twisted register bank arbitrator. The proposed bank arbitrator aims to balance register bank accesses by determining a target bank with warp and register IDs. We evaluate the performance of twisted bank arbitrator by using a cycle-level GPU simulator. Based on our evaluation, the proposed bank arbitrator shows 11.4% performance improvement over the baseline by improving the register file utilization.
그래픽 프로세싱 유닛의 성능 향상을 위한 프리로딩 연구
박은성(Eun Seong Park),정은비(Eunbi Jeong),윤명국(Myung Kuk Yoon) 대한전자공학회 2023 대한전자공학회 학술대회 Vol.2023 No.6
In this paper, a new architecture is proposed for GPUs that aims to solve two problems present in previous prefetching architectures. The first problem is the cache eviction problem caused by the additional prefetch memory requests. The second problem is the performance limitation of the prefetching architecture due to the extra access cycles required to load prefetched data from the L1 cache to the register file. The proposed preloading architecture addresses these problems by prefetching data into dedicated storage, which can then be directly loaded into the register file when demand memory requests access the storage. According to the evaluation results, the proposed architecture shows about 11% of performance improvement over the baseline.