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      • KCI등재

        NMOSFET의 Hot-Carrier 열화현상

        백종무(Baek, Jong-Mu),김영춘(Kim, Young-Choon),조문택(Cho, Moon-Taek) 한국산학기술학회 2009 한국산학기술학회논문지 Vol.10 No.12

        본 논문에서는 아날로그 회로에 사용되는 NMOSFET에 대한 Hot-Carrier 열화특성을 조사하였다. 여러 값을 갖는 게이트 전압으로 스트레스를 인가한 후, 소자의 파라미터 열화를 포화 영역에서 측정하였다. 스트레스 게이트 전압의 범위에 따라 계면 상태(interface state) 뿐 아니라 전자와 정공의 포획이 드레인 근처 게이트 산화막에서 확인 되었다. 그리고 특히 낮은 게이트 전압의 포화영역에서는 정공의 포획이 많이 발생하였다. 이러한 전하들의 포획은 전달 컨덕턴스 (gm) 및 출력 컨덕턴스 (gds)의 열화의 원인이 된다. 아날로그 동작 범위의 소자에서 파라미터 열화는 소자의 채널 길이에 매우 민감하게 반응한다. 채널길이가 짧을수록 정공 포획이 채널 전도도에 미치는 영향이 증가하 게 되어 열화가 증가되었다. 이와 같이 아날로그 동작 조건 및 아날로그 소자의 구조에 따라 gm 및 gds의 변화가 발 생하므로 원하는 전압 이득(AV=gm/gds)을 얻기 위해서는 회로 설계시 이러한 요소들에 대한 고려가 필요하다. This study has provided some of the first experimental results of NMOSFET hot-carrier degradation for the analog circuit application. After hot-carrier stress under the whole range of gate voltage, the degradation of NMOSFET characteristics is measured in saturation region. In addition to interface states, the evidences of hole and electron traps are found near drain depending on the biased gate voltage, which is believed to the cause for the variation of the transconductance(gm) and the output conductance(gds). And it is found that hole trap is a dominant mechanism of device degradation in a low-gate voltage saturation region, The parameter degradation is sensitive to the channel length of devices. As the channel length is shortened, the influence of hole trap on the channel conductance is increased. Because the magnitude of gm and gds are increased or decreased depending on analog operation conditions and analog device structures, careful transistor design including the level of the biased gate voltage and the channel length is therefore required for optimal voltage gain (AV=gm/gds) in analog circuit.

      • KCI등재

        기반 기술 : 새로운 트렌치 게이트 MOSFET 제조 공정기술 및 특성

        백종무 ( Jong Mu Baek ),조문택 ( Moon Taek Cho ),나승권 ( Seung Kwon Na ),백종무 ( Jong Mu Baek ),조문택 ( Moon Taek Cho ),나승권 ( Seung Kwon Na ) 한국항행학회 2014 韓國航行學會論文誌 Vol.18 No.4

        본 논문에서는 트렌치 게이트 MOSFET에 적용을 위한 고 신뢰성을 갖는 트렌치 형성기술과 고품격의 제조기술을 제안하였다. 이는 향후 전력용 MOSFET 에 널리 적용이 가능하다. 트렌치 구조는 DMOSFET에서 셀 피치크기를 줄여서 Ron 특성을 개선하거나 대다수 전력용 IC에서 전력용 소자를 다른 CMOS(Complementary Metal Oxide Semiconductor) 소자로부터 독립시킬 목적으로 채용된다. 마스크 레이어를 사용하여 자기정렬기술과 산화막 스페이서가 채용된 고밀도 트렌치 MOSFET를 제작하기 위한 새로운 공정방법을 구현하였다. 이 기술은 공정 스텝수를 감소시키고 트렌치 폭과 소오스, p-body 영역을 감소시킴으로써 결과적으로 셀 밀도와 전류 구동성능을 증가시키며 온 저항의 감소를 가져왔다. In this paper, high reliable trench formation technique and a novel fabrication techniques for trench gate MOSFET is proposed which is a key to expend application of power MOSFET in the future. Trench structure has been employed device to improve Ron characteristics by shrinkage cell pitch size in DMOSFET and to isolate power device part from another CMOS device part in some power integrated circuit. A new process method for fabricating very high density trench MOSFETs using mask layers with oxide spacers and self-align technique is realized. This technique reduces the process steps, trench width and source and p=body region with a resulting increase in cell density and current driving capability and decrease in on resistance.

      • KCI등재

        양성자가 주입된 NPT형 전력용 다이오드의 전류-전압 특성

        김병길,백종무,이재성,배영호,Kim Byoung-Gil,Baek Jong-Mu,Lee Jae-Sung,Bae Young-Ho 한국전기전자재료학회 2006 전기전자재료학회논문지 Vol.19 No.1

        Local minority carrier lifetime control by means of particle irradiation is an useful technology for Production of modern silicon Power devices. Crystal damage due to ion irradiation can be easily localized by choosing appropriate irradiation energy and minority tarrier lifetime can be reduced locally only in the damaged layer. In this work, proton irradiation technology was used for improving the switching characteristics of a un diode. The irradiation was carried out with various energy and dose condition. The device was characterized by current-voltage, capacitance-voltage, and reverse recovery time measurements. Forward voltage drop was increased to 1.1 V at forward current of 5 A, which was $120\%$ of its original device. Reverse leakage current was 64 nA at reverse voltage of 100 V, and reverse breakdown voltage was 670 V which was the same voltage as original device without irradiation. The reverse recovery time of device was reduced to about $20\%$ compared to that of original device without irradiation.

      • KCI등재

        양성자 주입 기술을 이용한 초고속 회복 다이오드의 제작

        이강희,김병길,이용현,백종무,이재성,배영호,Lee, Kang-Hee,Kim, Byoung-Gil,Lee, Yong-Hyun,Baek, Jong-Mu,Lee, Jae-Sung,Bae, Young-Ho 한국전기전자재료학회 2004 전기전자재료학회논문지 Vol.17 No.12

        Proton irradiation technology was used for the improvement of power diode switching characteristics. Proton irradiation was carried out at the energies of 2.32 MeV, 2.55 MeV, 2.97 MeV so that the projection range of irradiated proton would be at the metallurgical junction, depletion region and neutral region of pn diode, respectively. Dose conditions were varied into three conditions of 1${\times}$10$^{11}$ cm$^{-2}$ , 1${\times}$10$^{12}$ cm$^{-2}$ , 1${\times}$10$^{13}$ cm$^{-2}$ at each condition of energies. Characterization of the device was performed by I-V(current-voltage), C-V(capacitance-voltage) and trr(reverse recovery time) measurement. At the optimum condition of irradiation, the reverse recovery time of device has been reduced about 1/5 compared to that of original un-irradiated device.

      • Matlab을 이용한 PV 시스템의 해석 및 모델링

        조문택(Moon-Taek Cho),송호빈(Ho-Bin Song),동현(Dong-Hyun Baek),김영춘(Young-Chun Kim),백종무(Jong-Mu Baek),조건식(Gun-Sik Cho) 대한전기학회 2010 대한전기학회 학술대회 논문집 Vol.2010 No.7

        In the previous study using pspice for pv systems modeling and simulation were performed.. In this paper, the most commonly used with PSPICE simulations using Matlab simulation tools, one of the solar system even easier to implement was modeled using simulink. If you use this control in the field is more diverse and accurate simulation and to implement it in a real system that can reduce trial and error will be able to get good simulation results.

      • PSPICE를 이용한 발광다이오드 모델링 및 분석

        조문택(Moon-Taek Cho),송호빈(Ho-Bin Song),김영춘(Young-Chun Kim),동현(Dong-Hyun Baek),황락훈(Lak-Hoon Hwang),백종무(Jong-Mu Baek),조건식(Gun-Sik Cho) 대한전기학회 2009 대한전기학회 학술대회 논문집 Vol.2009 No.7

        Worldwide problem, due to the depletion of energy to power more efficient use of the same capacity to improvise for the use of LED brightness is growing. Recent advances in LED technology have lead to LEDs' widespread use in outdoor-signal applications, such as in traffic and railroad signals. Likewise, for large system design and production of issues leading to the simulation should be performed with less effort than to create a system that is reliable. In this paper a wide field of use to more accurately simulate a LED, and easy to use PSPICE can be used as general-purpose use of the LED device modeling. According to a particular LED, the device easy to use basic input variables to the values of library. In order to determine the behavior of the library to provide basic diode device, compared with PSPICE simulations confirm the accuracy of the simulation was performed.

      • 마이크로 센서에의 응용을 위한 SnO₂_(-x)열산화 박막의 특성

        김태훈,정완영,홍영호,백종무,최만식,이덕동 경북대학교 센서기술연구소 1994 센서技術學術大會論文集 Vol.5 No.1

        SnO_(2-x) thin films were prepated by thermal evaporation of metal tin granules on silicon wafer and were oxidized under various furnace termperature in exposure to O_(2). Mobility, carrier concerntration and resistivity of the SnO_(2-x) thin films were measured by Hall effect measurement and 4-point probe method. The temperature profile in thermal oxidation showed great effects on electric properites and surface structures of the thin films. The thin films were used for the sensing membrane of C_(4)H_(10) microsensor. The contact characteristics of Pt electrode-SnO_(2-x) and sensing properties of the films were investigated.

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