Sensitivity Controllable CMOS Image Sensor Pixel Using Control Gate Overlaid on Photodiode

Chae, Youngcheol,Choe, Kunil,Kim, Bokyung,Han, Gunhee IEEE 2007 IEEE electron device letters Vol.28 No.6

<P> A new sensitivity controllable pixel structure is proposed for CMOS active-pixel image sensor. The proposed pixel structure has a sensitivity control gate overlaid on the photodiode. The sensitivity of the pixel is controlled by the bias voltage of the control gate that forms a variable accumulation-mode MOS capacitor. The prototype sensor is fabricated with a 0.35-<TEX>$\mu\hbox{m}$</TEX> CMOS process and consists of 60 <TEX>$\times$</TEX> 240 pixels with 5.6- <TEX>$\mu\hbox{m}$</TEX> pixel pitch. Measurement results show that the sensitivity of the photodiode can be controlled by a factor of 4. </P>

Low Voltage, Low Power, Inverter-Based Switched-Capacitor Delta-Sigma Modulator

Chae, Youngcheol,Han, Gunhee IEEE 2009 IEEE journal of solid-state circuits Vol.44 No.2

<P> An operational transconductance amplifier (OTA) is a major building block and consumes most of the power in switched-capacitor (SC) circuits, but it is difficult to design low-voltage OTAs in scaled CMOS technologies. Instead of using an OTA, this paper proposes an inverter-based SC circuit and its application to low-voltage, low-power delta-sigma <TEX>$(\Delta \Sigma)$</TEX> modulators. Detailed analysis and design optimizations are also provided. Three inverter-based <TEX>$\Delta \Sigma$</TEX> modulators are implemented for an implantable pacemaker, a CMOS image sensor, and an audio codec. The modulator-I for an implantable pacemaker achieves 65-dB peak-SNDR for 120-Hz bandwidth consuming 0.73 <TEX>$\mu$</TEX> W with 1.5 V supply. The modulator-II for a CMOS image sensor implemented with 320-channel parallel ADC architecture achieves 63-dB peak-SNDR for 8-kHz bandwidth consuming 5.6<TEX>$\ \mu$</TEX>W for each channel with 1.2-V supply. The modulator-III for an audio codec achieves 81-dB peak-SNDR with 20-kHz bandwidth consuming 36 <TEX>$\mu$</TEX>W with 0.7-V supply. The prototype <TEX>$\Delta \Sigma$</TEX> modulators achieved high power efficiency maintaining sufficient performances for practical applications. </P>

심장박동 조절장치를 위한 1V 아날로그 CMOS 전단 처리기

채영철(Youngcheol Chae),이정환(Jeongwhan Lee),이인희(Inhee Lee),한건희(Gunhee Han) 대한전자공학회 2009 電子工學會論文誌-SD (Semiconductor and devices) Vol.46 No.1

심장박동 조절장치를 위한 저전압 저전력 전단 처리기를 제안한다. 제안된 회로는 80 ㎐에서 120 ㎐의 대역폭을 가지는 4차의 스위치드 커패시터 필터와 0 ㏈에서 24 ㏈까지 0.094 ㏈ 간격으로 전압이득의 조절이 가능한 전압증폭기를 구현하였다. 낮은 전압에서 동작하고, 전력소모를 극소화 하기위해서 인버터 기반의 스위치드 커패시터 회로를 사용하였으며, 인버터가 가지는 작은 전압이득을 보상하기 위해서 상호상관 기법을 사용하였다. 제안된 회로는 0.35-㎛ CMOS 공정을 이용하여 구현되었으며, 5㎑의 샘플링 주파수에서 80-㏈의 SFDR을 가진다. 이때 전력소모는 1 V의 전원전압에서 330 ㎻에 불과하다. A low-voltage, low-power analog CMOS front-end for a cardiac pacemaker is proposed. The circuits include a 4th order switched-capacitor (SC) filter with a passband of 80-120 ㎐ and a SC variable gain amplifier whose control range is from 0 to 24-㏈ with 0.094 ㏈ step. An inverter-based switched-capacitor circuit technique is used for low-voltage operation and ultra-low power consumption, and correlated double sampling technique is used for reducing the finite gain effect of an inverter. The proposed circuit has been designed in a 0.35-㎛ CMOS process, and it achieves 80-㏈ SFDR at 5-㎑ sampling frequency. The power consumption is only 330 ㎻ at 1-V power supply.

심장박동 조절장치를 위한 저전압 저전력 델타 시그마 모듈레이터

채영철(Youngcheol Chae),이정환(Jeongwhan Lee),이인희(Inhee Lee),한건희(Gunhee Han) 대한전자공학회 2009 電子工學會論文誌-SD (Semiconductor and devices) Vol.46 No.1

심장박동 조절장치를 위한 저전압 저전력 델타 시그마 모듈레이터를 제안하였다. 제안된 회로는 feedforward 구조를 이용한 델타 시그마 모듈레이터 단을 계단식 형태로 설계하였으며, 이를 통하여 저전압 환경에서도 비교적 높은 해상도를 구현할 수 있었다. 인버터 기반의 스위치드 커패시터 회로를 이용하여 전력소모를 최소화 하고, 낮은 전압에서도 동작 가능하도록 설계되었다. 제안된 회로는 0.35-㎛ CMOS 공정을 이용하여 구현되었으며, 샘플링 주파수가 7.6 ㎑ 이고 120㎐ 대역폭에서 61-㏈ SNDR, 63-㏈ SNR, 그리고 65-㏈ DR 을 가진다. 이때 전력소모는 1-V 전원전압에서 280 ㎻ 에 불과하다. A low voltage, low power delta-sigma modualtor is proposed for cardiac pacemaker applications. A cascade of delta-sigma modulator stages that employ a feedforward topology has been used to implement a high-resolution oversampling ADC under the low supply. An inverter-based switched-capacitor circuit technique is used for low-voltage operation and ultra-low power consumption. An experimental prototype of the proposed circuit has been implemented in a 0.35-㎛ CMOS process, and it achieves 61-㏈ SNDR, 63-㏈ SNR, and 65-㏈ DR for a 120-㎐ signal bandwidth at 7.6-㎑ sampling frequency. The power consumption is only 280 ㎻ at 1-V power supply.

Smart CMOS Image Sensor With High SBR and Subpixel Resolution for Light-Section-Based Range Finding

Jimin Cheon,Youngcheol Chae,Dongsoo Kim,Seunghyun Lim,Inhee Lee,Hyoung-Ki Lee,Dong Jo Kim,Gunhee Han IEEE 2009 IEEE transactions on electron devices Vol.56 No.11

<P>Light-section (LS)-based range finders are commonly used for obstacle recognition in home service robots and autonomous vehicles. This paper proposes a smart CMOS image sensor for LS-based range finding. The proposed sensor can detect the laser light, even under very strong ambient-illumination levels by using a multiple-capture frame-correlated double sampling (F-CDS), which is realized with an inverter-based switched-capacitor F-CDS accumulator. The proposed sensor also includes on-chip winner-take-all circuits that significantly reduce the software and hardware complexity of interpolation for the subpixel resolution. The prototype chip was fabricated using a 0.35-mum CMOS process. The measurement results show that the proposed sensor can detect a laser line with an intensity that is 56.5 dB lower than that of the ambient illumination, providing a spatial resolution of plusmn0.16 pixels.</P>

A Dual-Capture Wide Dynamic Range CMOS Image Sensor Using Floating-Diffusion Capacitor

Kim, Dongsoo,Chae, Youngcheol,Cho, Jihyun,Han, Gunhee IEEE 2008 IEEE transactions on electron devices Vol.55 No.10

<P> A dual-capture wide dynamic range CMOS image sensor using an in-pixel floating-diffusion (FD) storage capacitor is proposed. The proposed structure uses the FD as a storage capacitor. The potential of the FD node is read out using a floating-gate capacitor without a contact metallization of the FD node to reduce the leakage. The proposed sensor was fabricated using a 0.35-<TEX Notation='TeX'><TEX>$\mu\hbox{m}$</TEX></TEX> CMOS process. The chip includes 320 <TEX Notation='TeX'><TEX>$\times$</TEX></TEX> 240 pixels whose pitch is 5.6 <TEX Notation='TeX'><TEX>$\mu\hbox{m}$</TEX></TEX> and whose fill factor is 36%. The measurement results show 100-dB dynamic range, and the leakage at the non-metalized FD is reduced to about one-third of that of the conventional FD with the contact metallization. </P>

Structure variation effects on device reliability of single photon avalanche diodes

Shin, Dongseok,Park, Byungchoul,Chae, Youngcheol,Yun, Ilgu Elsevier 2017 Microelectronics reliability Vol.76 No.-

<P>Single photon avalanche diode (SPAD) is one of the promising candidates among photodetectors due to its high sensitivity and accuracy. Along with the existing custom compound avalanche diodes, SPADs fabricated in CMOS technology have been suggested and studied widely due to its advantage in manufacturing cost and system integration capability. Since SPAD is the core device in photodetector module and can be applied to the usage of the autonomous driving system, the reliability of SPADs should be addressed and studied. In this paper, the device reliability and temperature dependence of SPADs varying the different device structures are investigated and the relationship between device structure and device characteristics is also discussed with modeling and simulation. (C) 2017 Elsevier Ltd. All rights reserved.</P>

Analysis and Design of Low-Power Continuous-Time Delta-Sigma Modulator Using Negative-R Assisted Integrator

Jang, MoonHyung,Lee, Changuk,Chae, Youngcheol IEEE 2019 IEEE journal of solid-state circuits Vol.54 No.1

<P>The opamp in the integrators of a continuous-time delta-sigma modulator (CTDSM) has stringent noise and linearity requirements, which lead to large power dissipation. In this paper, a <I>negative-R assisted integrator</I> is proposed to mitigate the opamp’s requirements including dc gain, unity gain bandwidth, thermal and 1/ <TEX>${f}$</TEX> noise, and linearity, thus enabling a drastic power reduction. We present two prototype CTDSMs using the negative-R assisted integrators that employ a single-bit and tri-level feedback digital-to-analog converter (DAC), respectively. The prototype CTDSMs were fabricated in 65-nm CMOS technology. The first CTDSM using a single-bit feedback DAC achieves dynamic range (DR)/signal to noise and distortion ratio (SNDR)/spurious-free dynamic range (SFDR) of 93.1/88.5/100.5 dB in a 20-kHz bandwidth while dissipating only 55 <TEX>$\mu \text{W}$</TEX> from a 1.2-V supply. The second CTDSM, with a tri-level feedback DAC, achieves DR/SNDR/SFDR of 98.2/94.1/107 dB in a 24-kHz bandwidth while dissipating only 68 <TEX>$\mu \text{W}$</TEX> from a 1.2-V supply. The figures of merit of the two CTDSMs are 178.7 and 183.6 dB, respectively, which are the best energy efficiency among state-of-the-art works.</P>

Conformal, graphene-based triboelectric nanogenerator for self-powered wearable electronics

Chu, Hyenwoo,Jang, Houk,Lee, Yongjun,Chae, Youngcheol,Ahn, Jong-Hyun Elsevier 2016 Nano energy Vol.27 No.-

<P><B>Abstract</B></P> <P>Long-term operation is a key requirement for the widespread use of wearable devices and systems. Typical energy-storage and harvesting approaches relying on rigid materials and device structures hinder conformable integration on soft and wrinkled human skin. Here, we report triboelectric nanogenerators (TENGs) that can form directly on human skin and operate wearable devices without recharging process. TENGs with a single-electrode-based structure were fabricated with atomically thin graphene (<1nm), polydimethylsiloxane (<1.5µm) and polyethylene terephthalate (<0.9µm) as the electrode, electrification layer and substrate, respectively, for low flexural rigidity. The conformal TENGs formed on human skin generated electricity by contact with various clothes or the human body. Their triboelectric performance depended on the effective contact area enabled self-powered touch sensors for an assistive communication system by converting analogous information of human motions to digital signals. Thus, TENGs have potential applications in a wide range of future wearable electronics.</P> <P><B>Highlights</B></P> <P> <UL> <LI> Structural design for conformal contact of TENGs on a rough skin surfaces. </LI> <LI> Enhancement of triboelectric effect via simple plasma treatment. </LI> <LI> Electrical power generation by contact of TENGs on a skin with various clothes. </LI> <LI> Self-powered communication devices formed on a human skin. </LI> </UL> </P>

Graphene-Based Three-Dimensional Capacitive Touch Sensor for Wearable Electronics

Kang, Minpyo,Kim, Jejung,Jang, Bongkyun,Chae, Youngcheol,Kim, Jae-Hyun,Ahn, Jong-Hyun American Chemical Society 2017 ACS NANO Vol.11 No.8

<P>The development of input device technology in a conformal and stretchable format is important for the advancement of various wearable electronics. Herein, we report a capacitive touch sensor with good sensing capabilities in both contact and noncontact modes, enabled by the use of graphene and a thin device geometry. This device can be integrated with highly deformable areas of the human body, such as the forearms and palms. This touch sensor detects multiple touch signals in acute recordings and recognizes the distance and shape of the approaching objects before direct contact is made. This technology offers a convenient and immersive human machine interface and additional potential utility as a multifunctional sensor for emerging wearable electronics and robotics.</P>