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USN 센서노드용 5.0GHz 광대역 RF 주파수합성기의 설계
강호용,김내수,채상훈 대한전자공학회 2008 電子工學會論文誌-CI (Computer and Information) Vol.45 No.6
This paper describes implementation of the 5.0GHz RF frequency synthesizer with 0.18㎛ silicon CMOS technology being used as an application of the IEEE802.15.4 USN sensor node transceiver modules. To get good performance of speed and noise, design of the each module like VCO, prescaler, 1/N divider, fractional divider with Σ-Δ modulator, and common circuits of the PLL has been optimized. Especially to get good performance of speed, power consumption, and wide tuning range, N-P MOS core structure has been used in design of the VCO. The chip area including pads for testing is 1.1*0.7㎟, and the chip area only core for IP in SoC is 1.0*0.4㎟. Through comparing and analysing of the designed two kind of the frequency synthesizer, we can conclude that if we improve a litter characteristics there is no problem to use their as IPs IEEE802.15.4 체계의 USN 센서노드 무선통신부에 내장하기 위한 5.0GHz 광대역 RF 주파수 합성기를 0.18㎛ 실리콘 CMOS 기술을 이용하여 설계하였다. 고속 저잡음 특성을 얻기 위하여 VCO, 프리스케일러, 1/N 분주기, Σ-Δ 모듈레이터 분수형 분주기, PLL 공통 회로 등의 설계 최적화에 중점을 두고 설계하였으며, 특히 VCO는 N-P MOS 코어 구조 및 12단 캡 뱅크를 적용하여 고속 저전력 및 광대역 튜닝 범위를 확보하였다. 설계된 칩의 크기는 1.1*0.7㎟이며, IP로 활용하기 위한 코어 부분의 크기는 1.0*0.4㎟이다. 2가지 종류의 주파수합성기를 설계한 다음 모의실험을 통하여 비교 분석해 본 결과 일부 특성만 개선한다면 IP로써 사용하는데 문제가 없을 것으로 나타났다.
USN 센서노드용 5.0GHz 광대역 RF 주파수합성기의 구현
강호용,김세한,표철식,채상훈 대한전자공학회 2011 電子工學會論文誌-SD (Semiconductor and devices) Vol.48 No.4
This paper describes implementation of the 5.0GHz RF frequency synthesizer with 0.18㎛ silicon CMOS technology being used as an application of the IEEE802.15.4 USN sensor node transceiver modules. To get good performance of speed and noise, design of the each module like VCO, prescaler, 1/N divider, fractional divider with Σ-Δ modulator, and common circuits of the PLL has been optimized. Especially to get excellent performance of high speed and wide tuning range, N-P MOS core structure and 12 step cap banks have been used in design of the VCO. The chip area including pads for testing is 1.1*0.7㎟, and the chip area only core for IP in SoC is 1.0*0.4㎟. Through analysing of the fabricated frequency synthesizer, we can see that it has wide operation range and excellent frequency characteristics. IEEE802.15.4 체계의 USN 센서노드 무선통신부에 내장하기 위한 5.0GHz 광대역 RF 주파수 합성기를 0.18㎛ 실리콘 CMOS 기술을 이용하여 제작하였다. 고속 저잡음 특성을 얻기 위하여 VCO, 프리스케일러, 1/N 분주기, Σ-Δ 모듈레이터 분수형 분주기, PLL 공통 회로 등의 설계 최적화에 중점을 두고 설계하였으며, 특히 VCO는 N-P MOS 코어 구조 및 12단 캡 뱅크를 적용하여 고속 및 광대역 튜닝 범위를 동시에 확보하였다. 설계된 칩의 크기는 1.1*0.7㎟이며, IP로 활용하기 위한 코어 부분의 크기는 1.0*0.4㎟이다. 주파수합성기를 제작한 다음 측을 통하여 분석해 본 결과 발진 범위 및 주파수 특성이 양호하게 나타났다.
USN 센서노드용 1.9GHz RF 주파수합성기의 구현
강호용,김내수,채상훈 대한전자공학회 2009 電子工學會論文誌-SD (Semiconductor and devices) Vol.46 No.5
This paper describes implementation of the 1.9GHz RF frequency synthesizer with 0.18㎛ silicon CMOS technology being used as an application of the USN sensor node transceiver modules. To get good performance of speed and noise, design of the each module like VCO, prescaler, 1/N divider, fractional divider with Σ-Δ modulator, and common circuits of the PLL has been optimized. Especially to get good performance of speed, power consumption, and wide tuning range, N-P MOS core structure has been used in design of the VCO. The chip area including pads for testing is 1.2x0.7㎟, and the chip area only core for IP in SoC is 1.1x0.4㎟. The test results show that there is no special spurs except -63.06dB of the 6MHz reference spurs in the PLL circuitry. There is good phase noise performance like -116.17dBc/Hz in 1MHz offset frequency. USN 센서노드 무선통신부에 내장하기 위한 1.9GHz RF 주파수 합성기를 0.18㎛ 실리콘 CMOS 기술을 이용하여 구현하였다. 고속 저잡음 특성을 얻기 위하여 VCO, 프리스케일러, 1/N 분주기, Σ-Δ 모듈레이터 분수형 분주기, PLL 공통 회로 등의 설계 최적화에 중점을 두고 설계하였으며, 특히 VCO는 N-P MOS 코어 구조 및 캡 뱅크를 적용하여 고속 저전력 및 넓은 튜닝 범위를 확보하였다. 설계된 칩의 크기는 1.2x0.7㎟이며, IP로 활용하기 위한 코어 부분의 크기는 1.1x0.4㎟이다. 측정 결과 PLL 회로의 잡음 면에서도 문제가 될 만한 특정 스퍼는 발생하지 않았으며, 6MHz 기본 스퍼에 해당하는 잡음은 -63.06dB로 나타났다. 위상잡음 특성은 1MHz 오프셋에서 -116.17dBc/Hz로서 양호한 특성을 보였다.
2P-232 Curing Behavior of Epoxy Resins by Mercaptan Hardener at Low Temperature
강호용,임종태,석웅철,권세진,강주희,송호준,이상국 한국공업화학회 2017 한국공업화학회 연구논문 초록집 Vol.2017 No.1
Adhesives are composed of epoxy resins, hardener and catalyst. Epoxy resins are important thermosetting polymers widely deployed in industrial applications including adhesives, coatings and electronics due to their high utility. The curing process of the epoxy resins can be carried out using a wide range of curing agents, such as amines, anhydrides, polyamides, phenol form aldehyde resins and polysulfides. In order to increase the productivity, it is required to epoxy adhesives rapidly cured at a low temperature. At low temperatures, the curing reaction of epoxy and mercaptan is faster than the reaction of epoxy and amine. In this paper, we studied the curing behaviors of diglycidyl ether of bisphenol A (DGEBA) with modified mercaptan hardener. We synthesized mercapto-copolymer by the sol-gel method for fast and low temperature curing.
Study on Curing Property of Mercaptan Hardener for Low-temperature
강호용,권세진,임종태,석웅철,강주희,송호준,이상국 한국공업화학회 2018 한국공업화학회 연구논문 초록집 Vol.2018 No.0
The development of epoxy adhesive with adhesive strength and high performance has led to a manufacturing of industry. The curing process of the epoxy resins can be carried out using a wide range of curing agents, such as amines, anhydrides, polyamides, phenol form aldehyde resins and polysulfides. Especially at low temperatures, the curing reaction of epoxy and mercaptan is faster than the reaction of epoxy and amine. In order to increase the productivity, it is required to epoxy adhesives rapidly cured at a low temperature. The mercaptan oligosiloxane resins were synthesized by sol-gel condensation reaction of (3-mercaptopropyl)-dimethoxysilane (MPDMS), (3-mercaptopropyl)-trimethoxysilane (MPTMS) and diphenylsilanediol (DPSD). The adhesive properties were analyzed by Differential Scanning Calorimetry (DSC), Gel Permeation Chromatography (GPC) and Matrix-Assisted Laser Desorption Ionization - Time of Flight mass spectrometer (MALDI-TOF).
강호용,박미룡,이승식,신창섭,박찬원,Kang, H.Y.,Park, M.R.,Lee, S.S.,Shin, C.S.,Park, C.W. 한국전자통신연구원 2021 전자통신동향분석 Vol.36 No.5
Owing to various restrictions in-field application, the low-speed, low-power-based industrial Internet-of-Things (IoT) network built in extremely harsh industrial environment sites requires multi-hop, channel hopping, and low-latency transmission characteristics. In the past, wired networks were used in industrial facilities; however, network technologies based on the Industrial IoT Network standard standardized for industrial applications, such as WirelessIO link, WirelessHART, SmartMesh, and eStar Link satisfy industrial requirements. Recently, the use of industrial IoT networks in industrial facilities has rapidly expanded. This paper covers the developments in industrial IoT network technologies and summarizes the major industrial IoT standard technologies that meets the requirements of industrial sites.