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      • 저저항 SALICIDE Gate 공정 개발 연구

        김은하,최효직,고대홍 연세대학교 산업기술연구소 1999 논문집 Vol.31 No.2

        Formations of TiSi₂ thin films by a solid state reaction between Ti thin films and Si substrates and the effects of the conditions of Si substrates have been investigated. Low-Resistant C54- TiSi films were formed by rapid thermal processes at 750℃ on the undroped Si (100) substrate, and at 800℃ on the As or B-doped Si (100) substrate as well as on As or B-droped poly-Si substrates. Cross-sectional TEM analyses confirmed the formation of small-grained C49 TiSi₂films by rapid thermal processes at 700℃ on pre-amorphized poly-Si substrate by As implantation. The temperatures of the transformation to the C5 phase decreased in small-grained C49- TiSi₂films. Finally, low resistant C54 TiSi₂thin films were selectively formed on gate, source, and drain regions by SALICIDE process with pre-amorphizaton of substrates. Microstructures and electrical properties of TiSi₂ film were investigated. Sheet resistance of TiSi₂ film on 1.2㎛-wide poly-Si gates was 3.8~4.2Ω/□, and XRD results showed phase formation of C54 TiSi₂ films.

      • KCI등재

        Microstructure Evolution of the Ir-inserted Ni Silicides with Additional Annealing

        윤기정,송오성 대한금속·재료학회 2009 METALS AND MATERIALS International Vol.15 No.1

        Thermally-evaporated 10 nm-Ni/1 nm-Ir/(poly)Si structures were fabricated in order to investigate the thermal stability of Ir-inserted nickel silicide after additional annealing. The silicide samples underwent rapid thermal annealing at 300℃ to 1200℃ for 40 s, followed by 30 min annealing at the given RTA temperatures. Silicides suitable for the salicide process were formed on the top of the single crystal and polycrystalline silicon substrates, mimicking actives and gates. The sheet resistance was measured using a four-point probe. High resolution x-ray diffraction and Auger depth profiling were used for phase and chemical composition analysis, respectively. Transmission electron microscope and scanning probe microscope were used to determine the cross-section structure and surface roughness. The silicide, which formed on single crystal silicon substrate with surface agglomeration after additional annealing, could defer the transformation of Ni(Ir)Si to Ni(Ir)Si2 and was stable at temperatures up to 1200℃. Moreover, the silicide thickness doubled. There were no outstanding changes in the silicide thickness on polycrystalline silicon. However, after additional annealing, the silicon-silicide mixing became serious and showed high resistance at temperatures >700℃. Auger depth profiling confirmed the increased thickness of the silicide layers after additional annealing without a change in composition. For a single crystal silicon substrate, the sheet resistance increased slightly due to the significant increases in surface roughness caused by surface agglomeration after additional annealing. Otherwise, there were almost no changes in surface roughness on the polycrystalline silicon substrate. The Ir-inserted nickel monosilicide was able to maintain a low resistance in a wide temperature range and is considered suitable for the nano-thick silicide process. Thermally-evaporated 10 nm-Ni/1 nm-Ir/(poly)Si structures were fabricated in order to investigate the thermal stability of Ir-inserted nickel silicide after additional annealing. The silicide samples underwent rapid thermal annealing at 300℃ to 1200℃ for 40 s, followed by 30 min annealing at the given RTA temperatures. Silicides suitable for the salicide process were formed on the top of the single crystal and polycrystalline silicon substrates, mimicking actives and gates. The sheet resistance was measured using a four-point probe. High resolution x-ray diffraction and Auger depth profiling were used for phase and chemical composition analysis, respectively. Transmission electron microscope and scanning probe microscope were used to determine the cross-section structure and surface roughness. The silicide, which formed on single crystal silicon substrate with surface agglomeration after additional annealing, could defer the transformation of Ni(Ir)Si to Ni(Ir)Si2 and was stable at temperatures up to 1200℃. Moreover, the silicide thickness doubled. There were no outstanding changes in the silicide thickness on polycrystalline silicon. However, after additional annealing, the silicon-silicide mixing became serious and showed high resistance at temperatures >700℃. Auger depth profiling confirmed the increased thickness of the silicide layers after additional annealing without a change in composition. For a single crystal silicon substrate, the sheet resistance increased slightly due to the significant increases in surface roughness caused by surface agglomeration after additional annealing. Otherwise, there were almost no changes in surface roughness on the polycrystalline silicon substrate. The Ir-inserted nickel monosilicide was able to maintain a low resistance in a wide temperature range and is considered suitable for the nano-thick silicide process.

      • KCI등재

        다결정 실리콘 기판 위에 형성된 나노급 니켈 코발트 복합살리사이드의 미세구조 분석

        송오성(Song Ohsung) 한국산학기술학회 2007 한국산학기술학회논문지 Vol.8 No.2

        최소선폭 0.1 ㎛ 이하의 살리사이드 공정을 상정하여 10 ㎚-Ni0.5CO0.5/70 ㎚-Poly-Si/200 ㎚-SiO₂ 구조로부터 쾌속 열처리를 이용해서 실리사이드 온도를 600-1100℃까지 변화시키면서 복합실리사이드를 제조하고 이들의 면저항 의 변화와 미세구조의 변화를 면저항 측정기와 TEM 수직단면, 오제이 두께 분석으로 확인하였다. 기존의 동일한 공정으로 제조된 니켈실리사이드에 비해 제안된 니켈 코발트 복합실리사이드는 900℃까지 저저항을 유지시킬 수 있는 장점이 있었고 20 ㎚ 두께의 균일한 실리사이드 층을 폴리실리콘 상부에 형성시킬 수 있었다. 고온 처리시에는 복합 실리사이드와 실리콘의 전기적으로 상분리되는 혼합현상으로 고저항 특성이 나타나는 문제를 확인하였다. 제안된 NiCo 합금 박막을 70 ㎚ 높이의 폴리실리콘 게이트를 가진 디바이스에 900℃ 이하의 실리사이드화 온도에서 효과적으로 살리사이드 공정의 적용이 기대되었다. We fabricated thermally-evaporated 10 ㎚-Ni/70 ㎚-Poly-Si/200 ㎚-SiO₂/Si and 10 ㎚-Ni0.5Co0.5/70 ㎚-Poly-Si/200 ㎚-SiO₂/Si structures to investigate the microstructure of nickel monosilicide at the elevated temperatures required for annealing. Silicides underwent rapid anneal at the temperatures of 600-1100℃ for 40 seconds. Silicides suitable for the salicide process formed on top of the polycrystalline silicon substrate mimicking the gates. A four-point tester was used to investigate the sheet resistances A transmission electron microscope and an Auger depth profile scope were employed for the determination of cross sectional microstructure and thickness. 20 ㎚ thick nickel cobalt composite silicides on polycrystalline silicon showed low resistance up to 900℃, while the conventional nickle silicide showed low resistance below 700℃, Through TEM analysis, we confirmed that the 70 ㎚-thick nickel cobalt composite silicide showed a unique silicon-silicide mixing at the high silicidation temperature of 1000℃. We identified Ni₃Si₂, CoSi₂ phase at 700℃ using an X-ray diffractometer. Auger depth profile analysis also supports the presence of this mixed microstructure. Our result implies that our newly proposed NiCo composite silicide from NiCo alloy films process may widen the thermal process window for the salicide process and be suitable for nano-thick silicides.

      • KCI등재

        중간층 Ti 두께에 따른 CoSi<sub>2</sub>의 에피텍시 성장

        정성희,송오성,Choeng, Seong-Hwee,Song, Oh-Sung 한국재료학회 2003 한국재료학회지 Vol.13 No.2

        Co/Ti bilayer structure in Co salicide process helps to the improvement of device speed by lowering contact resistance due to the epitaxial growth of $CoSi_2$layers. We investigated the epitaxial growth and interfacial mass transport of $CoSi_2$layers formed from $150 \AA$-Co/Ti structure with two step rapid thermal annealing (RTA). The thicknesses of Ti layers were varied from 20 $\AA$ to 100 $\AA$. After we confirmed the appropriate deposition of Ti film even below $100\AA$-thick, we investigated the cross sectional microstructure, surface roughness, eptiaxial growth, and mass transportation of$ CoSi_2$films formed from various Ti thickness with a cross sectional transmission electron microscopy XTEM), scanning probe microscopy (SPM), X-ray diffractometery (XRD), and Auger electron depth profiling, respectively. We found that all Ti interlayer led to$ CoSi_2$epitaxial growth, while $20 \AA$-thick Ti caused imperfect epitaxy. Ti interlayer also caused Co-Ti-Si compounds on top of $CoSi_2$, which were very hard to remove selectively. Our result implied that we need to employ appropriate Ti thickness to enhance the epitaxial growth as well as to lessen Co-Ti-Si compound formation.

      • KCI등재

        티타늄과 코발트 박막의 산화규소 스페이서에 대한 열적안정성

        정성희,송오성,김민성,Cheong, Seong-Hwee,Song, Oh-Sung,Kim, Min-Sung 한국재료학회 2002 한국재료학회지 Vol.12 No.11

        We investigated the reaction stability of titanium, cobalt and their bilayer films with side-wall spacer materials of SiO$_2$ for the salicide process. We prepared Ti 350 $\AA$, Co 150 $\AA$, Co 150 $\AA$/Ti 100 $\AA$ and Ti 100 $\AA$/Co 150 $\AA$ films on 1000 $\AA$-thick thermally grown SiO$_2$ substrates, respectively. Then the samples were rapid thermal annealed at the temperatures of $500^{\circ}C$, $600^{\circ}C$, and $700^{\circ}C$ for 20 seconds. We characterized the sheet resistance of the metallic layers with a four-point probe, surface roughness with scanning probe microscope, residual phases with an Auger depth profilometer, phase identification with a X-ray diffractometer, and cross-sectional microstructure evolution with a transmission electron microscope, respectively. We report that Ti reacted with silicon dioxide spacers above $700^{\circ}C$, Co agglomerated at $600^{\circ}C$, and Co/Ti, Ti/Co formed CoTi compound requiring a special wet process.

      • KCI등재

        이리듐 첨가에 의한 니켈모노실리사이드의 고온 안정화

        윤기정,송오성,Yoon, Ki-Jeong,Song, Oh-Sung 한국재료학회 2006 한국재료학회지 Vol.16 No.9

        We fabricated thermal evaporated 10 nm-Ni/(poly)Si and 10 nm-Ni/1 nm-Ir/(poly)Si films to investigate the thermal stability of nickel monosilicide at the elevated temperatures by rapid annealing them at the temperatures of $300{\sim}1200^{\circ}C$ for 40 seconds. Silicides for salicide process was formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester is used for sheet resistance. Scanning electron microscope and field ion beam were employed for thickness and microstructure evolution characterization. An x-ray diffractometer and an auger depth profile scope were used for phase and composition analysis, respectively. Nickel silicides with iridium on single crystal silicon actives and polycrystalline silicon gates showed low resistance up to $1200^{\circ}C$ and $800^{\circ}C$, respectively, while the conventional nickel monosilicide showed low resistance below $700^{\circ}C$. The grain boundary diffusion and agglomeration of silicides led to lower the NiSi stable temperature with polycrystalline silicon substrates. Our result implies that our newly proposed Ir added NiSi process may widen the thermal process window for nano CMOS process.

      • KCI등재

        다양한 박막층을 채용한 코발트실리사이드의 물성

        정성희,송오성,Cheong, Seong-Hwee,Song, Oh-Sung 한국재료학회 2003 한국재료학회지 Vol.13 No.5

        The $CoSi_2$ process is widely employed in a salicide as well as an ohmic layer process. In this experiment, we investigated the characteristics of $CoSi_2$ films by combinations of I-type (TiN 100$\AA$/Co 150$\AA$), II-type(TiN 100$\AA$/Co 150$\AA$/Ti 50$\AA$), III-type(Ti 100$\AA$/Co 150$\AA$/Ti 50$\AA$), and IV-type(Ti 100$\AA$/Co 150$\AA$/Ti 100$\AA$). Sheet resistances of $CoSi_2$ show the lowest resistance with 2.9 $\Omega$/sq. in a TiN/Co condition and much higher resistances in conditions simultaneously applying Ti capping layers and Ti interlayers. Though we couldn't observe a $CoSi_2$roughness dependence on the film stacks from RMS values, Ti capping layers turned into 78∼94$\AA$ thick TiN layers of (200) preferred orientation at $N_2$ambient. In addition, Ti interlayers helped to form the epitaxial $CoSi_2$with (200) preferred orientation and ternary compounds of Co-Ti-Si. We propose that film structures of II-type and III-type may be appropriate in the salicide process and the ohmic layer process from the viewpoint of Co diffusion kinetics and the CoSi$_2$epitaxy.

      • KCI등재

        10 nm 두께의 니켈 코발트 합금 박막으로부터 제조된 니켈코발트 복합실리사이드의 미세구조 분석

        송오성,김상엽,김종률,Song, Oh-Sung,Kim, Sang-Yeob,Kim, Jong-Ryul 한국전기전자재료학회 2007 전기전자재료학회논문지 Vol.20 No.4

        We fabricated thermally-evaporated 10 nm-Ni/(poly)Si and 10 nm-$Ni_{0.5}Co_{0.5}$/(Poly)Si structures to investigate the microstructure of nickel silicides at the elevated temperatures required lot annealing. Silicides underwent rapid annealing at the temperatures of $600{\sim}1100^{\circ}C$ for 40 seconds. Silicides suitable for the salicide process formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester was used to investigate the sheet resistances. A transmission electron microscope and an Auger depth profilescope were employed for the determination of vortical microstructure and thickness. Nickel silicides with cobalt on single crystal silicon actives and polycrystalline silicon gates showed low resistance up to $1100^{\circ}C$ and $900^{\circ}C$, respectively, while the conventional nickle monosilicide showed low resistance below $700^{\circ}C$. Through TEM analysis, we confirmed that a uniform, $10{\sim}15 nm$-thick silicide layer formed on the single-crystal silicon substrate for the Co-alloyed case while a non-uniform, agglomerated layer was observed for the conventional nickel silicide. On the polycrystalline silicon substrate, we confirmed that the conventional nickel silicide showed a unique silicon-silicide mixing at the high silicidation temperature of $1000^{\circ}C$. Auger depth profile analysis also supports the presence of this mixed microstructure. Our result implies that our newly proposed NiCo-alloy composite silicide process may widen the thermal process window for the salicide process and be suitable for nano-thick silicides.

      • SCOPUSKCI등재

        두꺼운 이중층 Co/Ti 막의 실리사이드화에 관한 연구

        이병욱,권영재,이종무,김영욱 한국세라믹학회 1996 한국세라믹학회지 Vol.33 No.9

        To investigate the final structures and reactions of silicides a somewhat thick Ti monolayer Co monolayer and Co/Ti bilayer films were deposited on single Si(100) wafer by electron beam evaporation followed by heat treatment using RTA system in N2 ambient. TiO2 film formed between Ti and TiSi2 layers due to oxgen or moisture in the Ti monolayer sample. The final layer structure obtained after the silicidation heat-treatment of the Co/Ti bilayer sample turned out to be TiSi2/CoSi2/Ti-Co-Si alloy/CoSi2/Si sbustrate. This implies that imperfect layer inversion occurred due to the formation of Ti-Co-Si intermediate phase.

      • KCI등재

        Characterization of NiCo Composite Silicides by 10 nm-Ni50Co50 Alloy Films with Additional Annealing

        송오성,윤기정,김상엽 대한금속·재료학회 2009 METALS AND MATERIALS International Vol.15 No.2

        We fabricated 10 nm-Ni50Co50 alloy films into a single crystal and a polycrystalline silicon substrate, and applied silicidation annealing to these substrates at 600 °C to 1100 °C for 40 s. To test the thermal stability of the processed silicide layers, we examined the change in their physical properties after an additional 30-min annealing at the given rapid thermal annealing (RTA) temperatures. To characterize the physical properties of the silicide layers, we used a four-point probe, an x-ray diffractometer (XRD), a transmission electron microscope, a scanning electron microscope, an Auger electron spectroscope, and an atomic force microscope. The silicide layer formed only through RTA showed low resistance (20 Ω/sq) at up to 1100 °C and 900 °C for the single crystal and for the polycrystalline silicon substrate, respectively. Sheet resistance after the additional 30-min annealing was low, and did not differ significantly before and after the additional annealing for the single crystal substrate, but it became high at all temperatures for the polycrystalline substrate. The XRD confirmed the formation of the NiSi (or Ni(Co)Si) phase, in which there were no changes after the additional annealing. The thickness of the RTA-formed silicide layers varied from 11 nm to 13 nm, 20 nm and 28 nm, depending on whether the temperature was 700 °C or 1000 °C, for both the single and the polycrystalline substrates. The thickness of the silicide layers tended to increase from 22 nm to 25 nm, 48 nm and 82 nm after the additional 30-min annealing. Auger depth profiling also confirmed changes in thickness with the additional annealing. The surface roughness was no greater than 10 nm in all cases, even with the additional annealing. We verified that the nano-silicide layer formed with the proposed nano-NiCo alloy films satisfied the requirements for the nano-CMOS process. We fabricated 10 nm-Ni50Co50 alloy films into a single crystal and a polycrystalline silicon substrate, and applied silicidation annealing to these substrates at 600 °C to 1100 °C for 40 s. To test the thermal stability of the processed silicide layers, we examined the change in their physical properties after an additional 30-min annealing at the given rapid thermal annealing (RTA) temperatures. To characterize the physical properties of the silicide layers, we used a four-point probe, an x-ray diffractometer (XRD), a transmission electron microscope, a scanning electron microscope, an Auger electron spectroscope, and an atomic force microscope. The silicide layer formed only through RTA showed low resistance (20 Ω/sq) at up to 1100 °C and 900 °C for the single crystal and for the polycrystalline silicon substrate, respectively. Sheet resistance after the additional 30-min annealing was low, and did not differ significantly before and after the additional annealing for the single crystal substrate, but it became high at all temperatures for the polycrystalline substrate. The XRD confirmed the formation of the NiSi (or Ni(Co)Si) phase, in which there were no changes after the additional annealing. The thickness of the RTA-formed silicide layers varied from 11 nm to 13 nm, 20 nm and 28 nm, depending on whether the temperature was 700 °C or 1000 °C, for both the single and the polycrystalline substrates. The thickness of the silicide layers tended to increase from 22 nm to 25 nm, 48 nm and 82 nm after the additional 30-min annealing. Auger depth profiling also confirmed changes in thickness with the additional annealing. The surface roughness was no greater than 10 nm in all cases, even with the additional annealing. We verified that the nano-silicide layer formed with the proposed nano-NiCo alloy films satisfied the requirements for the nano-CMOS process.

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