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Jeongmin Lee,Il Hwan Cho,Dongsun Seo,Seongjae Cho,Byung-Gook Park 대한전자공학회 2016 Journal of semiconductor technology and science Vol.16 No.6
Recently, GeSn is drawing great deal of interests as one of the candidates for group-IV-driven optical interconnect for integration with the Si complementary metal-oxide-semiconductor (CMOS) owing to its pseudo-direct band structure and high electron and hole mobilities. However, the large lattice mismatch between GeSn and Si as well as the Sn segregation have been considered to be issues in preparing GeSn on Si. In this work, we deposit the GeSn films on Si by DC magnetron sputtering at a low temperature of 250°C and characterize the thin films. To reduce the stresses by GeSn onto Si, Ge buffer deposited under different processing conditions were inserted between Si and GeSn. As the result, polycrystalline GeSn domains with Sn atomic fraction of 6.51% on Si were successfully obtained and it has been demonstrated that the Ge buffer layer deposited at a higher sputtering power can relax the stress induced by the large lattice mismatch between Si substrate and GeSn thin films.
Lee, Jeongmin,Cho, Il Hwan,Seo, Dongsun,Cho, Seongjae,Park, Byung-Gook The Institute of Electronics and Information Engin 2016 Journal of semiconductor technology and science Vol.16 No.6
Recently, GeSn is drawing great deal of interests as one of the candidates for group-IV-driven optical interconnect for integration with the Si complementary metal-oxide-semiconductor (CMOS) owing to its pseudo-direct band structure and high electron and hole mobilities. However, the large lattice mismatch between GeSn and Si as well as the Sn segregation have been considered to be issues in preparing GeSn on Si. In this work, we deposit the GeSn films on Si by DC magnetron sputtering at a low temperature of $250^{\circ}C$ and characterize the thin films. To reduce the stresses by GeSn onto Si, Ge buffer deposited under different processing conditions were inserted between Si and GeSn. As the result, polycrystalline GeSn domains with Sn atomic fraction of 6.51% on Si were successfully obtained and it has been demonstrated that the Ge buffer layer deposited at a higher sputtering power can relax the stress induced by the large lattice mismatch between Si substrate and GeSn thin films.
연구 논문 : 구리 산화 방지를 위한 Core-Shell 구조 입자 합성과 저온 치밀화를 통한 도전성 필러 응용
심영호 ( Yong Ho Shim ),박성대 ( Seong Dae Park ),김희택 ( Hee Taik Kim ) 한국공업화학회 2012 공업화학 Vol.23 No.6
전자·통신 산업이 발달하면서 도전성 재료의 사용이 증가하게 되었다. 그에 따라 주로 사용되어오던 귀금속들을 대신할 저렴한 재료들이 필요하게 되었다. 그 중 구리는 귀금속에 비해 값이 저렴하고, 유사한 열·전기적 특성을 가졌지만 대기 중에서 쉽게 산화가 되는 문제점이 있다. 산화를 방지하기 위해서는 제조공정이 복잡해져 사용에 제한이 되어왔다. 구리의 산화 방지를 위한 방법 중 하나로 산화에 강한 금속을 Core-Shell 구조로 도금시켜 고유의 특성을 유지하며 산화를 방지하는 방법이 있다. 본 연구에서는 무전해 도금법으로 구리분말에 주석(Sn) 도금을 했고, 도금에 영향을 주는 인자들에 대해서 연구했다. XRD, FE-SEM, FIB, 4-Point Probe 등의 분석결과 구리 표면에 치밀한 주석 피막이 도금되었고, 대기 중에서 산화가 되지 않았다. 분석결과를 바탕으로 최적의 도금 조건을 도출했고, 추가적으로, 도전성 필러 응용 가능성에 대한 실험을 했다. 합성된 분말을 pellet 형태로 압분 성형한 후 저온 열처리 전과 후의 변화를 분석했다. 그 결과 저온 치밀화를 통해 용융된 주석이 구리 입자들을 상호연결 시켰고, 전기 전도가 향상되었다. Recently, it has been increasing trend to use conductive materials as electronics and communication technology in electronics industry are developing. The noble metal such as Ag, Pt, Pd etc. are mostly used as conductive materials, To reduce production cost, alternative materials with similar characteristics of noble metals are needed. Copper has advantages, i.e its electronic properties are similar to noble metals and low cost than noble metal, but its use has been restricted because of oxidation in air. In this study, the tin film was coated on copper by electroless plating to protect copper from oxidation and to confirm the effects of temperature, pH, amount of SnCl2, and feeding speed in plating conditions. Additionally, we apply CucoreSnshell powder as conductive filler with low-temperature densification and analysis by SEM, XRD, FIB and 4-Point Probe techniques. As result of the study, tin film was coated well on copper and was protected from oxidation. After low-temperature densification treatment, the meted tin made chemical interconnections with copper. Accordingly, conductivity was increased than before condition. We hope CucoreSnshell powder to replace noble metals and use in the electronic field.
이정민,조일환,서동선,조성재,박병국 대한전자공학회 2016 Journal of semiconductor technology and science Vol.16 No.6
Recently, GeSn is drawing great deal of interests as one of the candidates for group-IV-driven optical interconnect for integration with the Si complementary metal-oxide-semiconductor (CMOS) owing to its pseudo-direct band structure and high electron and hole mobilities. However, the large lattice mismatch between GeSn and Si as well as the Sn segregation have been considered to be issues in preparing GeSn on Si. In this work, we deposit the GeSn films on Si by DC magnetron sputtering at a low temperature of 250°C and characterize the thin films. To reduce the stresses by GeSn onto Si, Ge buffer deposited under different processing conditions were inserted between Si and GeSn. As the result, polycrystalline GeSn domains with Sn atomic fraction of 6.51% on Si were successfully obtained and it has been demonstrated that the Ge buffer layer deposited at a higher sputtering power can relax the stress induced by the large lattice mismatch between Si substrate and GeSn thin films.