http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.
변환된 중국어를 복사하여 사용하시면 됩니다.
고형화 ( Hyung Hwa Ko ),서석용 ( Seok Yong Seo ) 한국항행학회 2015 한국항행학회논문지 Vol.19 No.6
Binary MQ arithmetic coding is widely used recently as a basic entropy coder in multimedia coding system. MQ coder esteems high in compression efficiency to be used in JBIG2 and JPEG2000. The importance of arithmetic coding is increasing after it is adopted as an unique entropy coder in HEVC standard. In the binary MQ coder, arithmetic approximation without multiplication is used in the process of recursive subdivision of range interval. Because of the MPS/LPS exchange activity happened in MQ coder, output byte tends to increase. This paper proposes an enhanced binary MQ arithmetic coder to make use of a lookup table for AQe using quantization skill in order to reduce the deficiency. Experimental results show that about 4% improvement of compression in case of JBIG2 for bi-level image compression standard. And also, about 1% improvement of compression ratio is obtained in case of lossless JPEG2000 coding. For the lossy JPEG2000 coding, about 1% improvement of PSNR at the same compression ratio. Additionally, computational complexity is not increasing.
JBIG2 심벌 ID 부호화를 위한 런코드 부호기의 하드웨어 구현
서석용 ( Seok Yong Seo ),고형화 ( Hyung Hwa Ko ) 한국항행학회 2011 한국항행학회논문지 Vol.15 No.2
In this paper, the RUNCODE encoder hardware IP was designed and implemented for symbol ID code length encoding, which is one of major modules of JBIG2 encoder for FAX. ImpulseC Codeveloper and Xilinx ISE/EDK program are used for the hardware generation and synthesis of VHDL code. The synthesized hardware was downloaded to Virtex-4 FX60 FPGA on ML410 development board. The synthesized hardware utilizes 13% of total slice of FPGA. Using Active-HDL tool, the hardware was verified showing normal operation. Compared with the software operating using Microblaze cpu on ML410 board, the synthesized hardware was better in operation time. The improvement ratio of operation time between the synthesized hardware and software showed about 40 times faster than software only operation. The synthesized H/W and S/W module cooperated to succeed in compressing the CCITT standard document.