전자집적회로의 무역수지와 그 방향성에 관한 연구

김광희(Kim, Kwang-Hee) 한국상품학회 2012 商品學硏究 Vol.30 No.5

본 연구에서는 국내 대표적인 부품ㆍ소재의 하나로 평가받는 ‘전자직접회로(Electronic integrated circuits)’에 초점을 맞추어, 주요수출입국(미국, 중국, 일본, 대만, 싱가폴) 대비 2000년부터 2011년 현재까지의 ‘경쟁력지수(Competitiveness Index)’ 동향과 문제점 등을 세부적으로 살펴보고자 했다. 관세율상의 HSK 물품 분류에서 품목번호 ‘8542’로 분류되는 전자직접회로의 수출입 증가 혹은 감소는, 곧바로 국내 전체 수출입에 영향을 미칠 만큼 그 수출입 규모는 크다. 실제로 2011년 기준으로 전자직접회로의 전체 수출액 대비 비중은 무려 7.1%를 차지하고 있고, 수입액 비중은 4.8%를 점유하고 있었다. 또한 같은 해 기준으로 전자직접회로의 수입액 가운데 68.5%를 차지할 만큼 그 수입규모가 높은 ‘모노리식 집적회로(8542-31-1000와 8542-39-1000)’의 경쟁력지수는, 분석 기간 내내 마이너스(negative)지수였다. 장기적으로 부품ㆍ소재산업의 글로벌 경쟁력을 확보하기 위해서는 부품ㆍ소재 수입액의 15.1%를 차지하는 전자직접회로의 경쟁력을 높여야 하고, 또 전자직접회로의 경쟁력에 직접적으로 영향을 미치는 그 하위품목(HSK 10단위) ‘모노리식 집적회로(8542-31-1000와 8542-39-1000)’의 경쟁력 확보가 필연적이라 하겠다. 전자직접회로에 대한 구체적인 경쟁력 분석 및 평가는, 향후 국내 부품ㆍ소재산업의 경쟁력 향상과 중소기업의 연구개발ㆍ기술전략, 대일 무역역조 개선 등에 유효한 대안이 될 것이다. This study aims to specifically take a look at the 'competitiveness index(CI)' trend, problem from 2000 to 2011 toward the major import/export nations(US., China, Japan, Taiwan, Singapore) by focusing on the 'electronic integrated circuits’ that are evaluated as one of the representative components and materials. The import/export scale is huge as much as the increase or decrease of the import/export of electronic integrated circuits affects the total domestic import/export immediately. As of 2011, the electronic integrated circuits account for 7.1%of the total export amount and 4.8%of the import amount. In addition, as of 2011, the ‘monolithic integrated circuits(8542-31-1000 and 8542-39-1000)’ whose import scalewas big asmuch as accounting for 68.5% of the import amount of electronic integrated circuits showed a minus(-) index for the analysis period. In the long run, it ismore important to raise the competitiveness of electronic integrated circuits accounting for 15.1% of the component and material import amount and secure the competitiveness of 'monolithic integrated circuits', a lower rank item, directly affecting the competitiveness of electronic integrated circuits in order to secure the global competitiveness of component andmaterial industry. It is judged that the specific competitiveness analysis and evaluation on electronic integrated circuits will present an effective alternative plan for the improvement of the competitiveness and adverse trade condition of the domestic component and material industry in the future.

A Complete Analysis of Tolerance of Component in Analog VLSI Circuits Using Sensitivity

J. Vineela,G. Praneetha,R. Harshad,K. Masrunnisa,M. Pruthvi Kumar,T. Sandeep 보안공학연구지원센터 2016 International Journal of Hybrid Information Techno Vol.9 No.7

In this paper we focused on practical method to perform tolerance analysis of analog circuits. Any circuit is the combination of passive, controlled and independent sources. The characteristics of analog circuit is totally depends upon the values of components used. So this paper gives detailed analysis of circuit parameter variation. To execute this analysis we use sensitivity method. Using this method we can analyze any analog circuit component tolerance. Tolerance is one of the most important parameter which is considered during the design of analog VLSI circuit. So with the help of sensitivity analysis we can also calculate the component tolerance. We perform sensitivity analysis of various circuit in this paper and show how the value of any component parameter change the circuit behavior. All the equation and model for sensitivity analysis of analog VLSI circuit and simulation are done with the help of MATLAB tool.

A Symmetrical Floating Impedance Scaling Circuit with Improved Low-frequency Characteristics

Fujihiko MATSUMOTO,Syuzo NISHIOKA,Shota MATSUO,Takeshi OHBUCHI 대한전자공학회 2017 IEIE Transactions on Smart Processing & Computing Vol.6 No.6

Impedance scaling techniques are known as methods to realize large capacitance with a small capacitor. Recently, a symmetrical floating impedance scaling (SFIS) circuit was proposed. However, the circuit has restrictions on operations at a lower frequency. In this paper, improvement techniques for low-frequency characteristics of the SFIS circuit are proposed. In order to enhance the terminal resistance, a negative impedance converter (NIC) block is employed in the SFIS circuit. In addition, cascode transistors are introduced to enhance the internal resistance associated with a capacitor in the SFIS circuit. The proposed techniques make the pole frequency lower. The proposed SFIS circuit is applied to a third-order Chebyshev filter via simulation. Cutoff frequency fc of the filter is set to 100 Hz, and the passband ripple of the filter is set to 0.5 dB. Simulation results show that the filter employing the proposed SFIS circuit is superior to a conventional one.

무역수지로 본 전자집적회로의 경쟁력 현황과 분석

김광희(Kwang-Hee Kim) 한국무역연구원 2008 貿易 硏究 Vol.4 No.3

By focusing on 'electronic integrated circuit' which is evaluated as one of domestic representative materials and components, this presentation intended to compare and analyze the trends of its 'competitiveness index' against Japan. Electronic integrated circuit, which is classified as item No. '8542' in HSK items classification in customs rate, presents tremendous scale of export and import, which increase and decrease immediately affect the entire amount of domestic export and import. As of 2007, the export ratio of electronic integrated circuit over the entire export occupied as much as 8.2%, and the import ratio nearly 20%. It may be that obtaining global competitive power of materials and components industry in the long run depends on raising the competitive power of electronic integrated circuit that occupies 1/5 the import amount of materials and components. After all, it is determined that specific competitive power analysis and evaluation of electronic integrated circuit will propose effective alternative for the improvement of future domestic materials and components competitive power, the improvement of research and development technology strategies of small medium companies and improvement of adverse balance of trading.

Estimation of Transferred Power from a Noise Source to an IC with Forwarded Power Characteristics

Bo Pu,Taeho Kim,SungJun Kim,Jong-hyeon Kim,SoYoung Kim,Wansoo Nah 한국전자파학회JEES 2013 Journal of Electromagnetic Engineering and Science Vol.13 No.4

This paper proposes an accurate approach for predicting transferred power from a noise source to integrated circuits based on the characteristics of the power transfer network. A power delivery trace on a package and a printed circuit board are designed to transmit power from an external source to integrated circuits. The power is demonstrated between an injection terminal on the edge of the printed circuit board and integrated circuits, and the power transfer function of the power distribution network is derived. A two-tier calibration is applied to the test, and scattering parameters of the network are measured for the calculation of the power transfer function. After testing to obtain the indispensable parameters, the real received and tolerable power of the integrated circuits can be easily achieved. Our proposed estimation method is an enhancement of the existing the International Electrotechnical Commission standard for precise prediction of the electromagnetic immunity of integrated circuits.

반도체집적회로 배치설계의 업무상 창작자 지위 인정과 종업원 보상에 대한 소고

전용철(Jun, Yong-cheul) 동아대학교 법학연구소 2016 東亞法學 Vol.- No.72

반도체집적회로의 배치설계에 관한 법률 제5조는 ‘업무상 창작한 배치설계의 창작자를 계약이나 근무규정 등에 달리 정한 것이 없으면 그 법인 등을 배치설계의 창작자로 한다’고 정하고 있어, 업무상 창작된 배치설계권의 경우 사용자가 원칙적으로 창작자 지위를 귀속 받게 된다. 따라서, 사용자는 업무상 창작된 배치설계권을 보유하고 권리를 행사할 수 있을 것이나, 실제 창작행위를 한 종업원은 반도체 배치설계 보호법만에 기초하여서는 보상을 받을 수 없다. 국가연구개발사업의 연구개발성과로서 배치설계권이 설정 등록되는 경우 기술의 이전 및 사업화 촉진에 관한 법률, 국가연구개발사업의 관리 등에 관한 규정에 따른 연구자 보상을 받을 수 있는 것과 대비된다. 최근 배치설계권의 설정등록 비중이 대기업은 줄어들고 대학은 늘어나는것으로 파악되는데, 반도체 산업의 구조와 특수성을 감안할 때 반도체 산업에서 비중이 매우 높은 기업체들에 의한 배치설계권 설정등록 건수가 많아지도록 유도할 필요가 있다고 본다. 이와 관련하여, 업무상 배치설계를 창작한 종업원에게 창작자 지위를 인정하고 창작에 따른 보상을 할 수 있도록 반도체 집적회로의 배치설계에 관한 법률이 개선될 수 있다면, 반도체 업체들에 의한 반도체집적회로의 배치설계에 관한 법률의 이용률을 제고할 수 있을 것으로 본다. 본 논문에서는 업무상 창작된 배치설계의 창작자 지위가 사용자에게 귀속되는지 여부를 위주로 국가별로 반도체 집적회로의 배치설계를 보호하기 위한 법률의 규정을 살펴보았다. 또한, 본 논문에서는 배치설계가 업무상 창작되는 경우 실제 창작행위를 한 종업원 등에 대한 보상이 가능한지를 살펴보았으며, 반도체집적회로의 배치설계에 관한 법률 제5조의 수정이 필요하다는 의견을 제시하였다. Article 5 of the Act on the Layout-Designs of Semiconductor Integrated Circuits provides that “With respect to a layout-design by a person employed by a government, a corporation, an association or other employer (hereinafter referred to as “corporation, etc”), the corporation, etc. is deemed to be the creator, unless otherwise provided in an agreement or an employment regulation and the like”. Pursuant to this provision, the position as a creator is in principle vested in the employer of the person who created the layout-design in service. Accordingly, the employer can own a right to the layout-design created in service and also exercise the right; however, no compensation is given to the employee who actually created the layout-design, only based on the laws associated with the semiconductor layout-design protection. This is compared with layout-designs created in national research & development (R & D) projects. In national R & D protects, if, as the R & D output, a layout-design is registered and accordingly a layout-design is established, the researcher who created the layout-design can receive compensation based on the Technology Transfer and Commercialization Promotion Acct and the Regulations on Management of National Research and Development Projects. Recently, it has been noted that the number of layout-design registrations by large companies has been reduced; conversely, that of layout-design registrations by the colleges and universities has increased. Considering structure and specialty of the semiconductor industry, it appears that it is necessary to induce those companies being of great importance in the semiconductor industry to increase the number of layout-design registrations. In this connection, it is seen that, if the Act on the Layout-Designs of Semiconductor Integrated Circuits is improved to recognize the employee who created the layout-design in service as a creator of the layout-design and to compensate him/her for the creation, the availability of the Act on the Layout-Designs of Semiconductor Integrated Circuits by the semiconductor companies would be enhanced. For this Paper, I have reviewed the laws and regulations to protect the layout-designs of the semiconductor integrated circuits by each country, based on whether the position as a creator of the layout-design created in service is vested in the employer. In addition, I have reviewed whether compensation can be given to the employee who actually performed the act of creating a layout-design if the layout-design was created in service, and whether it is necessary to revise Article 5 of the Act on the Layout-Designs of Semiconductor Integrated Circuits.

High-resistance resistors consisting of subthreshold-operated CMOS circuits

Shin’ichi Asai,Ken Ueno,Tetsuya Asai,Yoshihito Amemiya 대한전자공학회 2009 ITC-CSCC :International Technical Conference on Ci Vol.2009 No.7

We propose a CMOS circuit that can be used as an equivalent of resistors. This circuit uses a differential pair consisting of diode-connected MOSFETs and operates as a high-resistance resistor when driven in the subthreshold region. Its resistance can be controlled in a range of 1-1000 ㏁ by adjusting the driving current for the circuit. The results of the fabrication and measurement of the circuit are described.

Integrate-and-Fire Neuron Circuit and Synaptic Device using Floating Body MOSFET with Spike Timing-Dependent Plasticity

권민우,김형진,박정진,박병국 대한전자공학회 2015 Journal of semiconductor technology and science Vol.15 No.6

In the previous work, we have proposed an integrate-and-fire neuron circuit and synaptic device based on the floating body MOSFET [1-3]. Integrate-and-Fire(I&F) neuron circuit emulates the biological neuron characteristics such as integration, threshold triggering, output generation, refractory period using floating body MOSFET. The synaptic device has short-term and long-term memory in a single silicon device. In this paper, we connect the neuron circuit and the synaptic device using current mirror circuit for summation of post synaptic pulses. We emulate spike-timing-dependent-plasticity (STDP) characteri- stics of the synapse using feedback voltage without controller or clock. Using memory device in the logic circuit, we can emulate biological synapse and neuron with a small number of devices.

Integrate-and-Fire Neuron Circuit and Synaptic Device with Floating Body MOSFETs

Min-Woo Kwon,Hyungjin Kim,Jungjin Park,Byung-Gook Park 대한전자공학회 2014 Journal of semiconductor technology and science Vol.14 No.6

We propose an integrate-and-fire neuron circuit and synaptic devices with the floating body MOSFETs. The synaptic devices consist of a floating body MOSFET to imitate biological synaptic characteristics. The synaptic learning is performed by hole accumulation. The synaptic device has shortterm and long-term memory in a single silicon device. I&F neuron circuit emulate the biological neuron characteristics such as integration, threshold triggering, output generation, and refractory period, using floating body MOSFET. The neuron circuit sends feedback signal to the synaptic transistor for long-term memory.

CMOS Analog Integrate-and-fire Neuron Circuit for Driving Memristor based on RRAM

Min-Woo Kwon,Myung-Hyun Baek,Jungjin Park,Hyungjin Kim,Sungmin Hwang,Byung-Gook Park 대한전자공학회 2017 Journal of semiconductor technology and science Vol.17 No.2

We designed the CMOS analog integrate and fire (I&F) neuron circuit for driving memristor based on resistive-switching random access memory (RRAM). And we fabricated the RRAM device that have HfO2 switching layer using atomic layer deposition (ALD). The RRAM device has gradual set and reset characteristics. By spice modeling of the synaptic device, we performed circuit simulation of synaptic device and CMOS neuron circuit. The neuron circuit consists of a current mirror for spatial integration, a capacitor for temporal integration, two inverters for pulse generation, a refractory part, and finally a feedback part for learning of the RRAM. We emulated the spike-timing-dependent-plasticity (STDP) characteristic that is performed automatically by presynaptic pulse and feedback signal of the neuron circuit. By STDP characteristics, the synaptic weight, conductance of the RRAM, is changed without additional control circuit.