A novel CMOS image sensor system for quantitative loop-mediated isothermal amplification assays to detect food-borne pathogens

Wang, Tiantian,Kim, Sanghyo,An, Jeong Ho Elsevier Biomedical 2017 Journal of microbiological methods Vol.133 No.-

<P><B>Abstract</B></P> <P>Loop-mediated isothermal amplification (LAMP) is considered as one of the alternatives to the conventional PCR and it is an inexpensive portable diagnostic system with minimal power consumption. The present work describes the application of LAMP in real-time photon detection and quantitative analysis of nucleic acids integrated with a disposable complementary-metal-oxide semiconductor (CMOS) image sensor. This novel system works as an amplification-coupled detection platform, relying on a CMOS image sensor, with the aid of a computerized circuitry controller for the temperature and light sources. The CMOS image sensor captures the light which is passing through the sensor surface and converts into digital units using an analog-to-digital converter (ADC). This new system monitors the real-time photon variation, caused by the color changes during amplification. <I>Escherichia coli</I> O157 was used as a proof-of-concept target for quantitative analysis, and compared with the results for <I>Staphylococcus aureus</I> and <I>Salmonella enterica</I> to confirm the efficiency of the system. The system detected various DNA concentrations of <I>E. coli</I> O157 in a short time (45min), with a detection limit of 10fg/μL. The low-cost, simple, and compact design, with low power consumption, represents a significant advance in the development of a portable, sensitive, user-friendly, real-time, and quantitative analytic tools for point-of-care diagnosis.</P> <P><B>Highlights</B></P> <P> <UL> <LI> Novel CMOS-based LAMP system as molecular diagnosis of pathogens </LI> <LI> Successful in real-time photon detection and quantitative analysis of nucleic acids </LI> <LI> Low cost, user friendly, simple with low power consumption technology </LI> <LI> Successful in detecting various concentrations DNA within short period </LI> </UL> </P>

First CMOS Silicon Avalanche Photodetectors With Over 10-GHz Bandwidth

IEEE 2016 IEEE Photonics Technology Letters Vol.28 No.3

<P>This letter reports on the first silicon avalanche photodetectors (APDs) with over 10-GHz bandwidth. Three types of APDs based on P<SUP>+</SUP>/N-well junction are realized in standard complementary metal-oxide-semiconductor (CMOS) technology. For bandwidth improvement, the CMOS-compatible APDs (CMOS-APDs) are designed to be smaller active area, and a spatially-modulated avalanche photodetector (SM-APD) is also proposed in order to further reduce the bandwidth limiting factor of the CMOS-APDs. Current-voltage characteristics, responsivities, and photodetection frequency responses of the three APDs are measured and compared, and the photodetection bandwidth characteristics are analyzed with an equivalent circuit model to identify the origin of the bandwidth improvement. The proposed small-area CMOS-APD provides 10-GHz bandwidth with high responsivity, and the SM-APD achieves 12-GHz bandwidth, which is the largest bandwidth ever reported for silicon photodetectors in standard CMOS technology.</P>

Performance Comparison of Two Types of Silicon Avalanche PhotodetectorsBased on N-well/P-substrate and P+/N-well JunctionsFabricated With Standard CMOS Technology

이명재,최우영 한국광학회 2011 Current Optics and Photonics Vol.15 No.1

We characterize and analyze silicon avalanche photodetectors (APDs) fabricated with standard complementary metal-oxide-semiconductor (CMOS) technology. Current characteristics, responsivity, avalanche gain, and photodetection bandwidth of CMOS-APDs based on two types of PN junctions, N-well/P-substrate and P+/N-well junctions, are compared and analyzed. It is demonstrated that the CMOS-APD using the P+/N-well junction has higher responsivity as well as higher photodetection bandwidth than N-well/P-substrate. In addition, the important factors influencing CMOS-APD performance are clarified from this investigation.

Optical-Power Dependence of Gain, Noise, and Bandwidth Characteristics for 850-nm CMOS Silicon Avalanche Photodetectors

Myung-Jae Lee,Rü,cker, Holger,Woo-Young Choi IEEE 2014 IEEE journal of selected topics in quantum electro Vol.20 No.6

<P>We investigate the effects of incident optical powers on the performance of 850-nm silicon avalanche photodetectors (APDs) realized with P<SUP>+</SUP>/N-well junctions in standard CMOS technology. The current-voltage characteristics, responsivities, avalanche gains, noise power spectral densities, excess noise factors, electrical reflection coefficients, and photodetection frequency responses of the fabricated CMOS-APD are measured for different incident optical powers. In addition, the photodetection frequency responses at different incident optical powers are modeled with equivalent circuits and the influence of the optical power on photodetection bandwidth is analyzed. From these, we show that, near the avalanche breakdown voltage, the CMOS-APD avalanche gain and excess noise factor increase and photodetection bandwidth decreases with decreasing incident optical power. These results should be very useful for realizing high-performance CMOS integrated optical receivers for various optical-interconnect applications.</P>

Optical Failure Analysis Technique in Deep Submicron CMOS Integrated Circuits

Sunkwon Kim,Hyongmin Lee,Hyunjoong Lee,Jong-Kwan Woo,Junho Cheon,Hwan-Yong Kim,Young June Park,Suhwan Kim 대한전자공학회 2011 Journal of semiconductor technology and science Vol.11 No.4

In this paper, we have proposed a new approach for optical failure analysis which employs a CMOS photon-emitting circuitry, consisting of a flipflop based on a sense amplifier and a photon-emitting device. This method can be used even with deepsubmicron processes where conventional optical failure analyses are difficult to use due to the low sensitivity in the near infrared (NIR) region of the spectrum. The effectiveness of our approach has been proved by the failure analysis of a prototype designed and fabricated in 0.18 μm CMOS process.

Optical Failure Analysis Technique in Deep Submicron CMOS Integrated Circuits

Kim, Sunk-Won,Lee, Hyong-Min,Lee, Hyun-Joong,Woo, Jong-Kwan,Cheon, Jun-Ho,Kim, Hwan-Yong,Park, Young-June,Kim, Su-Hwan The Institute of Electronics and Information Engin 2011 Journal of semiconductor technology and science Vol.11 No.4

In this paper, we have proposed a new approach for optical failure analysis which employs a CMOS photon-emitting circuitry, consisting of a flip-flop based on a sense amplifier and a photon-emitting device. This method can be used even with deep-submicron processes where conventional optical failure analyses are difficult to use due to the low sensitivity in the near infrared (NIR) region of the spectrum. The effectiveness of our approach has been proved by the failure analysis of a prototype designed and fabricated in 0.18 ${\mu}m$ CMOS process.

포톤 계수 방식의 $32{\times}32$ 픽셀 어레이를 갖는 디지털 CMOS X-ray 이미지 센서 설계

성관영,김태호,황윤금,전성채,진승오,허영,하판봉,박무훈,김영희,Sung, Kwan-Young,Kim, Tae-Ho,Hwang, Yoon-Geum,Jeon, Sung-Chae,Jin, Seung-Oh,Huh, Young,Ha, Pan-Bong,Park, Mu-Hun,Kim, Young-Hee 한국정보통신학회 2008 한국정보통신학회논문지 Vol.12 No.7

본 논문에서는 $0.18{\mu}m$ triple-well CMOS 공정을 사용하여 포톤계수 방식의 $32{\times}32$ 픽셀 어레이를 갖는 CMOS ray 영상센서를 설계하였다. 설계된 영상센서의 카픽셀은 $100{\times}100\;{\mu}m2$ 면적을 가지고 있고 약 400개의 트랜지스터로 구성되어 있으며, 범프 본딩을 통해 ray 검출기와 CSA(Charge Sensitive Amplifier)의 연결을 위한 $50{\times}50{\mu}m2$의 오픈패드를 가지고 있다. 각각의 싱글픽셀 CSA에서 전압 바이어스 회로를 사용한 folded cascode CMOS OP amp 대신 레이아웃 면적을 줄이기 위하여 self biased folded cascode CMOS OP amp를 이용하였으며, 계수 모드 진입 전후에 CLK에서 발생 할 수 있는 short pulse를 제거하는 15bit LFSR 계수기 (Linear Feedback Shift Register Counter) 클럭 발생회로를 제안하였으며, 읽기 모드에서 CMOS X-ray 영상센서의 최대 전류를 줄이기 위하여 열 어드레스 디코더를 이용하여 한 열씩 읽도록 설계하였다. In this paper, x-ray image sensor of photon counting type having a $32{\times}32$ pixel array is designed with $0.18{\mu}m$ triple-well CMOS process. Each pixel of the designed image sensor has an area of loot $100{\times}100\;{\mu}m2$ and is composed of about 400 transistors. It has an open pad of an area of $50{\times}50{\mu}m2$ of CSA(charge Sensitive Amplifier) with x-ray detector through a bump bonding. To reduce layout size, self-biased folded cascode CMOS OP amp is used instead of folded cascode OP amp with voltage bias circuit at each single-pixel CSA, and 15-bit LFSR(Linear Feedback Shift Register) counter clock generator is proposed to remove short pulse which occurs from the clock before and after it enters the counting mode. And it is designed that sensor data can be read out of the sensor column by column using a column address decoder to reduce the maximum current of the CMOS x-ray image sensor in the readout mode.

Improved Circuits for Single-photon Avalanche Photodiode Detectors

Kim, Kyunghoon,Lee, Junan,Song, Bongsub,Burm, Jinwook The Institute of Electronics and Information Engin 2014 Journal of semiconductor technology and science Vol.14 No.6

A CMOS photo detection bias quenching circuit is developed to be used with single photon avalanche photodiodes (SPADs) operating in Geiger mode for the detection of weak optical signals. The proposed bias quenching circuits for the performance improvement reduce the circuit size as well as improve the performance of the quenching operation. They are fabricated in a $0.18-{\mu}m$ standard CMOS technology to verify the effectiveness of this technique with the chip area of only $300{\mu}m^2$, which is about 60 % of the previous reported circuit. Two types of proposed circuits with resistive and capacitive load demonstrated improved performance of reduced quenching time. With a commercial APD by HAMAMATSU, the dead time can be adjusted as small as 50 ns.

Improved Circuits for Single-photon Avalanche Photodiode Detectors

김경훈,이준안,송봉섭,범진욱 대한전자공학회 2014 Journal of semiconductor technology and science Vol.14 No.6

A CMOS photo detection bias quenching circuit is developed to be used with single photon avalanche photodiodes (SPADs) operating in Geiger mode for the detection of weak optical signals. The proposed bias quenching circuits for the performance improvement reduce the circuit size as well as improve the performance of the quenching operation. They are fabricated in a 0.18-μm standard CMOS technology to verify the effectiveness of this technique with the chip area of only 300 μm2, which is about 60 % of the previous reported circuit. Two types of proposed circuits with resistive and capacitive load demonstrated improved performance of reduced quenching time. With a commercial APD by HAMAMATSU, the dead time can be adjusted as small as 50 ns.

Improved Circuits for Single-photon Avalanche Photodiode Detectors

Kyunghoon Kim,Junan Lee,Bongsub Song,Jinwook Burm 대한전자공학회 2014 Journal of semiconductor technology and science Vol.14 No.6

A CMOS photo detection bias quenching circuit is developed to be used with single photon avalanche photodiodes (SPADs) operating in Geiger mode for the detection of weak optical signals. The proposed bias quenching circuits for the performance improvement reduce the circuit size as well as improve the performance of the quenching operation. They are fabricated in a 0.18-㎛ standard CMOS technology to verify the effectiveness of this technique with the chip area of only 300 ㎛², which is about 60 % of the previous reported circuit. Two types of proposed circuits with resistive and capacitive load demonstrated improved performance of reduced quenching time. With a commercial APD by HAMAMATSU, the dead time can be adjusted as small as 50 ㎱.