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Shinil Chang,Jubong Park,Kwang-Ho Won,Hyunchol Shin 대한전자공학회 2008 Journal of semiconductor technology and science Vol.8 No.2
A novel compact model for a five-port transformer balun is proposed for the efficient circuit design of hybrid balun. Compared to the conventional model, the proposed model provides much faster computation time and more reasonable values for the extracted parameters. The hybrid balun, realized in 0.18 ㎛ CMOS, achieves 2.8 ㏈ higher gain and 1.9 ㏈ lower noise figure than its passive counterpart only at a current consumption of 0.67 ㎃ from 1.2 V supply. By employing the hybrid balun, a differential zero-IF receiver is designed in 0.18 ㎛ CMOS for IEEE 802.15.4 ZigBee applications. It is composed of a differential cascode LNA, passive mixers, and active RC filters. Comparative investigations on the three receiver designs, each employing the hybrid balun, a simple transformer balun, and an ideal balun, clearly demonstrate the advantages of the hybrid balun in fully differential CMOS RF receivers. The simulated results of the receiver with the hybrid balun show 33 ㏈ of conversion gain, 4.2 ㏈ of noise figure with 20 ㎑ of 1/f noise corner frequency, and -17.5 ㏈m of IIP3 at a current consumption of 5 ㎃ from 1.8 V supply.
A Compact Circuit Model of Five-Port Transformer Balun for CMOS RF Integrated Circuits
CHANG, Shinil,SHIN, Hyunchol The Institute of Electronics, Information and Comm 2008 IEICE transactions on electronics Vol.91e.c No.10
<P>A compact circuit model for five-port on-chip transformer balun is presented. Compared to the conventional model, the proposed model is simpler without any accuracy degradation and ensures faster convergence time, which in turn enables flexible RF circuit design optimization. The validity of the proposed model is confirmed through extensive EM simulations and measurements.</P>
2.4 ㎓ 저전력 차동 직접 변환 CMOS RF 수신기를 위한 새로운 하이브리드 발룬 회로
장신일(Shinil Chang),박주봉(Jubong Park),신현철(Hyunchol Shin) 대한전자공학회 2008 電子工學會論文誌-SD (Semiconductor and devices) Vol.45 No.4
2.4 ㎓ 대역 완전차동 직접변환 수신기를 위한 저전력, 저잡음, 고선형성을 가지는 새로운 구조의 하이브리드 발룬(Hybrid Balun) 회로를 제안한다. 제안된 하이브리드 발룬은 수동형 트랜스포머(Passive Transformer)와 손실 보상용 보조 증폭기(Loss-compensating Auxiliary Amplifiers)로 구성된다. 트랜스포머와 보상용 증폭기 사이의 신호의 분리와 결합에 대한 설계 이슈들을 제시하였다. 0.18 ㎛ 공정으로 제작된 하이브리드 발룬은 수동형 발룬에 비해 2.4 ㎓ 대역에서 이득은 2.8 ㏈ 높고 잡음지수는 1.9 ㏈ 낮으며, 측정된 IIP3는 +23 ㏈m 이다. 전체 전력소모는 1.2 V 전원 전압에서 0.67 ㎃로서 저전력으로 구현되었다. 하이브리드 발룬 기술을 적용하여 설계된 무선센서노드용 CMOS 직접변환 수신기는 수동형 발룬을 사용했을 때 비해 0.82 ㎽의 추가 전력소모만으로 전체 잡음 지수를 현저히 낮출 수 있음을 확인하였다. A low-power, low-noise, highly-linear hybrid balun circuit is proposed for 2.4-㎓ fully differential CMOS direct conversion receivers. The hybrid balun is composed of a passive transformer and loss-compensating auxiliary amplifiers. Design issues regarding the optimal signal splitting and coupling between the transformer and compensating amplifiers are discussed. Implemented in 0.18 μm CMOS process, the 2.4 ㎓ hybrid balun achieves 2.8 ㏈ higher gain and 1.9 ㏈ lower noise figure than its passive counterpart and +23 ㏈m of IIP3 only at a current consumption of 0.67 ㎃ from 1.2 V supply. It is also examined that the hybrid balun can remarkably lower the total noise figure of a 2.4 ㎓ fully differential RF receiver only at a cost of 0.82 ㎽ additional power dissipation.
A CMOS Receiver Front-end with Fractional-N PLL Synthesizer for MedRadio Applications
Yongho Lee,Shinil Chang,Jaegyeong Choi,Mihye Moon,Seungsoo Kim,Hyunchol Shin 대한전자공학회 2018 Journal of semiconductor technology and science Vol.18 No.6
A CMOS RF receiver front-end with an integrated fractional-N PLL synthesizer and 25% duty-cycle LO generator is presented for MedRadio applications. The receiver front-end comprises a cascode low-noise amplifier, single-to-differential gmstage, quadrature passive mixer, and trans-impedance amplifiers. The PLL synthesizer generates 1.45-1.95 GHz signal, which is then divided by four to generate 25% duty-cycle non-overlapping I/Q LO signals for improved gain and noise performances of the quadrature passive mixer. Implemented in 65 nm CMOS, the fully integrated receiver operates from a 1-V supply, while dissipating 3.2 and 3.5 mW for the RF front-end and PLL synthesizer, respectively. It achieves the voltage gain of +42.2 dB, the noise figure of 3.3 dB, and the input-referred third-order intercept point (IIP3) of -24 dBm. The low-power consumption, high front-end gain, and full integration with the PLL and LO generator make this receiver well suited for low-power small-form-factor MedRadio applications.