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신경망을 이용한 반도체 공정 시뮬레이터 : 포토공정 오버레이 사례연구
박상훈,서상혁,김지현,김성식,Park Sanghoon,Seo Sanghyok,Kim Jihyun,Kim Sung-Shick 한국시뮬레이션학회 2005 한국시뮬레이션학회 논문지 Vol.14 No.4
The advancement in semiconductor technology is leading toward smaller critical dimension designs and larger wafer manufactures. Due to such phenomena, semiconductor industry is in need of an accurate control of the process. Photolithography is one of the key processes where the pattern of each layer is formed. In this process, precise superposition of the current layer to the previous layer is critical. Therefore overlay parameters of the semiconductor photolithography process is targeted for this research. The complex relationship among the input parameters and the output metrologies is difficult to understand and harder yet to model. Because of the superiority in modeling multi-nonlinear relationships, neural networks is used for the simulator modeling. For training the neural networks, conjugate gradient method is employed. An experiment is performed to evaluate the performance among the proposed neural network simulator, stepwise regression model, and the currently practiced prediction model from the test site.