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Kang, Junmo,Jariwala, Deep,Ryder, Christopher R.,Wells, Spencer A.,Choi, Yongsuk,Hwang, Euyheon,Cho, Jeong Ho,Marks, Tobin J.,Hersam, Mark C. American Chemical Society 2016 Nano letters Vol.16 No.4
<P>Black phosphorus (BP) has recently emerged as a promising narrow band gap layered semiconductor with optoelectronic properties that bridge the gap between semimetallic graphene and wide band gap transition metal dichalcogenides such as MoS2. To date, BP field-effect transistors have utilized a lateral geometry with in-plane transport dominating device characteristics. In contrast, we present here a vertical field-effect transistor geometry based on a graphene/BP van der Waals heterostructure. The resulting device characteristics include high on-state current densities (>1600 A/cm(2)) and current on/off ratios exceeding 800 at low temperature. Two distinct charge transport mechanisms are identified, which are dominant for different regimes of temperature and gate voltage. In particular, the Schottky barrier between graphene and BP determines charge transport at high temperatures and positive gate voltages, whereas tunneling dominates at low temperatures and negative gate voltages. These results elucidate out-of-plane electronic transport in BP and thus have implications for the design and operation of BP-based van der Waals heterostructures.</P>
Low-Voltage 2D Material Field-Effect Transistors Enabled by Ion Gel Capacitive Coupling
Choi, Yongsuk,Kang, Junmo,Jariwala, Deep,Wells, Spencer A.,Kang, Moon Sung,Marks, Tobin J.,Hersam, Mark C.,Cho, Jeong Ho American Chemical Society 2017 Chemistry of materials Vol.29 No.9
<P>Capacitive coupling between an overlying ion gel electrolyte and an underlying oxide thin film is utilized to substantially suppress the operating voltage of field-effect transistors (FETs) based on two-dimensional (2D) transition metal dichalcogenides and black phosphorus. The coupling of the layers is achieved following device fabrication by laminating an ion gel layer over an oxide-gated 2D FET through solution-casting methods. While the original pristine 2D FET requires tens of volts for gating through the oxide layer, the laminated ion gel layer reduces the operating voltage to below 4 V even when the same underlying substrate is used as the back gate electrode. Moreover, this capacitive coupling approach allows low-voltage operation without compromising the off-current level, which often occurs when ion gel electrolytes are directly employed as the gate dielectric material. This approach can likely be generalized to a wide variety of thin-film FETs as a postfabrication method for reducing operating voltages and power consumption.</P>