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Bumhee Bae,Kim, Jonghoon J.,Sukjin Kim,Sunkyu Kong,Joungho Kim [Institute of Electrical and Electronics Engineers 2015 IEEE transactions on electromagnetic compatibility Vol.57 No.3
<P>Analog-to-digital converter (ADC) is becoming of utmost importance in an automotive environment. With the increased number of magnetic field sources near the ADC that can alter its behaviors significantly, we need to model how magnetic field affects the performance of the ADC. Therefore, in order to accurately evaluate the practical performance of the ADC and the considerable off-chip and on-chip effects that are highly complex, the chip-printed circuit board (PCB) comodeling, cosimulation, and coanalysis are required. In this study, a comodel of the magnetic field effects on an ADC is proposed. The proposed comodel includes three separate submodels: a model of the magnetic field coupling from the wireless power transfer (WPT) system input to the PCB integrated with ADC, a model of the noise coupling from the PCB to the ADC input, and a model of the ADC behavior from the ADC input to the ADC outputs. Considering the magnetic field coupling from the magnetic field source to the PCB, a new inductive transmission line model (I-TLM) method is developed. This method achieves fast, precise, and broadband estimation of the magnetic field effects in comparison to previous estimation methods. To validate the proposed comodel, an ADC is fabricated using a 0.13-μm complementary metal-oxide semiconductor process and is wire-bonded to the designed PCB for ADC. A PCB-level WPT system is designed and built as the magnetic field source. The performance factor of the ADC is measured by sweeping the WPT system input frequency from 100 kHz to 1 GHz to find out the critical WPT system frequency for the designed ADC with the chip-PCB hierarchical structure. The results estimated by the proposed model correlate well with the full 3-D electromagnetic field simulation and measurement. The proposed modeling procedure reduces the time and computation resource in the design of the chip, package, and PCB to achieve high-quality analog devices or mixed-mode systems, while also providing an intuitive understanding of the radiated noise effect.</P>
Sunkyu Kong,Bumhee Bae,Jung, Daniel H.,Kim, Jonghoon J.,Sukjin Kim,Chiuk Song,Jonghoon Kim,Joungho Kim Professional Technical Group on Microwace Theory a 2015 IEEE Transactions on Microwave Theory and Techniqu Vol. No.
<P>Wireless power transfer (WPT) technology has recently emerged as an innovative and promising technology, and its electromagnetic compatibility (EMC) has become a significant issue. In this study, we investigated the electromagnetic (EM) radiated emission and interference generated by WPT systems using resonant magnetic field coupling, especially in applications with multi-coil configurations. The change in coil resonance associated with multi-coil configurations was analyzed via the impedance profile. We measured the EM radiated emission and analyzed the results with respect to the coil resonance. An analog-to-digital converter chip was designed and fabricated to analyze the effect of electromagnetic interference (EMI). Based on measurement and simulation results, we verified that the EM radiated emission and interference increase at the series or parallel resonance peaks, depending on the source type. In addition, we verified that EMI can be reduced by using ferrite sheet shielding.</P>
Application of Machine Learning for Optimization of 3-D Integrated Circuits and Systems
Park, Sung Joo,Bae, Bumhee,Kim, Joungho,Swaminathan, Madhavan Institute of Electrical and Electronics Engineers 2017 IEEE transactions on very large scale integration Vol.25 No.6
<P>The 3-D integration helps improve performance and density of electronic systems. However, since electrical and thermal performance for 3-D integration is related to each other, their codesign is required. Machine learning, a promising approach in artificial intelligence, has recently shown promise for addressing engineering optimization problems. In this paper, we apply machine learning for the optimization of 3-D integrated systems where the electrical performance and thermal performance need to be analyzed together for maximizing performance. In such systems, modeling can be challenging due to the multiscale geometries involved, which increases computation time per iteration. In this paper, we show that machine learning can be applied to such systems where multiple parameters can be optimized to achieve the desired performance using the minimum number of iterations. These results have been compared with other promising optimization methods in this paper. The results show that on an average, 4.4%, 31.1%, and 6.9% improvement in temperature gradient, CPU time, and skew are possible using machine learning, as compared with other methods.</P>
Through-Silicon Via Capacitance–Voltage Hysteresis Modeling for 2.5-D and 3-D IC
Kim, Dong-Hyun,Kim, Youngwoo,Cho, Jonghyun,Bae, Bumhee,Park, Junyong,Lee, Hyunsuk,Lim, Jaemin,Kim, Jonghoon J.,Piersanti, Stefano,de Paulis, Francesco,Orlandi, Antonio,Kim, Joungho IEEE 2017 IEEE transactions on components, packaging, and ma Vol.7 No.6
<P>We propose, for the first time, an explicit semiconductor physics-based through-silicon via (TSV) capacitance-voltage (CV) model. The effect of TSV CV hysteresis is demonstrated in the model, and the TSV capacitance is modeled with respect to dc bias voltage and the dimension of the TSV. The proposed model is verified by comparison to the measurement results. The effect of hysteresis in the model correlates well with the measurement results. This model can be utilized in a circuit level simulation to expand the possible application of the model to, but not limited to, hierarchical power distribution network impedance analysis, RC delay analysis, input-output power consumption analysis, and crosstalk and eye diagram simulation in any 3-D-IC systems using TSVs.</P>
Kim, Jonghoon J.,Changhyun Cho,Bumhee Bae,Sukjin Kim,Sunkyu Kong,Heegon Kim,Jung, Daniel H.,Jiseong Kim,Joungho Kim IEEE 2014 IEEE transactions on components, packaging, and ma Vol.4 No.12
<P>A simultaneous switching current (SSC) drawn by an integrated circuit (IC) creates simultaneous switching noise on power nets, which in turn causes jitters in the I/O signals and reduces the maximum clock frequency. For a thorough analysis of high-speed ICs, there is a dire need to measure currents at specific power pins of the ICs. In this paper, a novel magnetically coupled embedded current probing structure is proposed for measuring the SSC on the chip level resulting from the logical activity of the I/O buffers. SSCs are found by capturing the magnetic flux induced by the SSC of interest, with the proposed embedded current probing structure using magnetic coupling, and then reconstructing the original current waveform using the transfer impedance profile. Through a series of measurements with test vehicles fabricated on the chip level, we experimentally verified the proposed probing structures in the time and frequency domains and proved that they can effectively measure the SSC. Finally, future directions for improvements are discussed at the end of this paper.</P>
Periodic Ground Structure for C-PHY Signaling in Mobile Applications
TaeWoong Kim,YoungBong Han,Hung Khac Le,JongWan Shim,KwangMo Yang,BumHee Bae,SoYoung Kim 대한전자공학회 2021 Journal of semiconductor technology and science Vol.21 No.5
In this paper, we propose periodic slit ground structure (PSG) to improve the signal integrity of multilevel signals at high data rate such as MIPI C-PHY. Periodic slits are added in the upper and lower ground planes of the stripline structure, without adding additional layers or increasing area, to reduce crosstalk among neighboring lines. The proposed PSG structure can effectively improve the eye-diagram, especially eye height (EH) in multilevel signaling. The effectiveness of the proposed structure is validated through simulation and measurement of PCB-flexible printed circuit board (FPCB)-PCB structure that emulates the interconnected system of MIPI C-PHY signal transmission in a mobile system. The measurements from the test structures show that at a 2.5 Gsps data rate condition, the PSG structures show improvement in EH and eye width (EW) by 38.6% and 9.7%, respectively, compared to stripline structures. The proposed idea can be generally applied in PCB designs that will be used in high speed multilevel signal transmission to improve EH.
Sukjin Kim,Jung, Daniel H.,Kim, Jonghoon J.,Bumhee Bae,Sunkyu Kong,Seungyoung Ahn,Jonghoon Kim,Joungho Kim IEEE 2015 IEEE transactions on components, packaging, and ma Vol.5 No.7
<P>As technology develops, the number of chips increases while the thickness of mobile products continuously decreases, which leads to the need for high-density packaging techniques with high numbers of power and signal lines. By applying wireless power transfer technology at the printed circuit board (PCB) and package levels, the number of power pins can be greatly reduced to produce more space for signal pins and other components in the system. For the first time, in this paper, we propose and demonstrate a high-efficiency PCB- and package-level wireless power transfer interconnection scheme. We enhance the efficiency by applying magnetic field resonance coupling using a matching capacitor. The proposed scheme can replace a high number of power interconnections with rectangular spiral coils to wirelessly transfer power from the source to the receiver at the PCB and package levels. The equivalent circuit model is suggested with analytic equations, which is then analyzed to optimize the test vehicle design. For the experimental verification of the suggested model, the $Z$ -parameter results obtained from the model-based equation and measurement of the designed and fabricated test vehicles are compared at up to 1 GHz. The power transfer efficiency from the source coil to the receiver coil in this scheme is able to reach 85.6%. Finally, we designed and fabricated a CMOS full-bridge rectifier and mounted it on the receiver board to convert the transferred voltage from ac voltage to dc voltage. A measured dc voltage of 2.0 V is sufficient to operate the circuit, which generally consists of 1.5 V devices.</P>
Kim, Hyesoo,Kim, Jonghoon J.,Park, Junyong,Park, Shinyoung,Choi, Sumin,Bae, Bumhee,Ha, DongHo,Bae, Michael,Kim, Joungho IEEE 2017 IEEE transactions on components, packaging, and ma Vol.7 No.8
<P>As a demand for electrical systems with a wide data bandwidth has increased, high-performance packages ensuring high data rates, such as low power double data rate series, have become common. The need for high-performance test sockets has also emerged to test these packages. However, a conventional pogo pin socket has a limited test bandwidth due to the parasitic components arising from its spring. On the other hand, a silicone rubber socket satisfies the wide bandwidth requirement because it has low parasitic components due to high-density conductive metal powders in an elastic silicone rubber. In this paper, we propose an RLGC equivalent circuit model of a silicone rubber socket and first experimentally verify it. The proposed model is experimentally verified in the frequency domain by comparing the insertion loss obtained from the proposed model to the measurement up to 20 GHz. The proposed model is experimentally verified in the time domain by comparing the eye diagrams obtained from the proposed model to the measurement at a data rate of 12.5 Gb/s. Also, the insertion loss of the sockets with varied height, diameter, and pitch is analyzed using the proposed model. The proposed model provides physical insight of a silicone rubber socket, and it allows to determine whether a socket is reliable for testing high performance packages in a short time. It also gives us the idea how to design a high-performance test socket. Furthermore, we discuss the current capacity and life cycle of the silicone rubber socket in terms of signal integrity as well.</P>
30 Gbps High-Speed Characterization and Channel Performance of Coaxial Through Silicon Via
Jung, Daniel H.,Heegon Kim,Sukjin Kim,Kim, Jonghoon J.,Bumhee Bae,Jonghoon Kim,Jong-Min Yook,Jun-Chul Kim,Joungho Kim THE INSTITUTE OF ELECTRICAL ENGINEERS 2014 IEEE Microwave and Wireless Components Letters Vol. No.
<P>Coaxial through silicon via (TSV) technique allows reduction of high frequency loss due to conductivity in silicon substrate and flexibility in impedance by controlling the ratio of shield to center radii. For the first time, we measured and analyzed the high-speed channel performance of coaxial TSV. This letter presents the measurement results of the fabricated test vehicle in S-parameter and eye-diagram. The eye-diagram measurement results prove that coaxial TSV is capable of supporting signal transmission up to bit rate of 30 Gbps. The equivalent circuit model is suggested and experimentally verified by S-parameter comparison. Furthermore, the superiority of coaxial TSV over conventional TSV is confirmed by comparison of S-parameter results from equivalent circuit model simulation.</P>