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고속 반도체 소자에서 배선 간의 Crosstalk에 의한 Coupling Capacitance 변화 분석
지희환,한인식,박성형,김용구,이희덕,Ji Hee-Hwan,Han In-Sik,Park Sung-Hyung,Kim Yong-Goo,Lee Hi-Deok 대한전자공학회 2005 電子工學會論文誌-SD (Semiconductor and devices) Vol.42 No.5
In this paper, novel test patterns and on-chip data are presented to indicate that the variation of coupling capacitance, ${\Delta}Cc$ by crosstalk can be larger than static coupling capacitance, Cc. It is also shown that ${\Delta}Cc$ is strongly dependent on the phase of aggressive lines. for anti-phase crosstalk ${\Delta}Cc$ is always larger than Cc while for in-phase crosstalk ${\Delta}Cc$ is smaller than Cc. HSPICE simulation shows good agreement with the measurement data. 본 논문에서는 Crosstalk에 의한 coupling capacitance의 변화량, ${\Delta}Cc$이 기본값인 Cc보다 더 커질 수 있음을 제안한 테스트 회로를 이용하여 실험적으로 증명하였다. 또한 ${\Delta}Cc$가 Aggressive line의 위상에 매우 의존함을 보였으며 위상이 같은 경우보다 반대인 경우에 ${\Delta}Cc$가 크게 됨을 보였다. 실험 결과의 타당성을 검증을 위해 HSPICE 시뮬레이션을 수행하여 실험치와 잘 맞음을 나타내었다.
Nano-scale PMOSFET에서 Plasma Nitrided Oixde에 대한 소자 특성의 의존성
한인식,지희환,구태규,유욱상,최원호,박성형,이희승,강영석,김대병,이희덕,Han, In-Shik,Ji, Hee-Hwan,Goo, Tae-Gyu,You, Ook-Sang,Choi, Won-Ho,Park, Sung-Hyung,Lee, Heui-Seung,Kang, Young-Seok,Kim, Dae-Byung,Lee, Hi-Deok 한국전기전자재료학회 2007 전기전자재료학회논문지 Vol.20 No.7
In this paper, the reliability (NBTI degradation: ${\Delta}V_{th}$) and device characteristic of nano-scale PMOSFET with plasma nitrided oxide (PNO) is characterized in depth by comparing those with thermally nitrided oxide (TNO). PNO case shows the reduction of gate leakage current and interface state density compared to TNO with no change of the $I_{D.sat}\;vs.\;I_{OFF}$ characteristics. Gate oxide capacitance (Cox) of PNO is larger than TNO and it increases as the N concentration increases in PNO. PNO also shows the improvement of NBTI characteristics because the nitrogen peak layer is located near the $Poly/SiO_2$ interface. However, if the nitrogen concentration in PNO oxide increases, threshold voltage degradation $({\Delta}V_{th})$ becomes more degraded by NBT stress due to the enhanced generation of the fixed oxide charges.
Nano-scale CMOS를 위한 Ni-germano Silicide의 열 안정성 연구
황빈봉,오순영,윤장근,김용진,지희환,김용구,왕진석,이희덕,Huang, Bin-Feng,Oh, Soon-Young,Yun, Jang-Gn,Kim, Yong-Jin,Ji, Hee-Hwan,Kim, Yong-Goo,Wang, Jin-Suk,Lee, Hi-Deok 한국전기전자재료학회 2004 전기전자재료학회논문지 Vol.17 No.11
In this paper, novel methods for improvement of thermal stability of Ni-germano Silicide were proposed for nano CMOS applications. It was shown that there happened agglomeration and abnormal oxidation in case of Ni-germano Silicide using Ni only structure. Therefore, 4 kinds of tri-layer structure, such as, Ti/Ni/TiN, Ni/Ti/TiN, Co/Ni/TiN and Ni/Co/TiN were proposed utilizing Co and Ti interlayer to improve thermal stability of Ni-germano Silicide. Ti/Ni/TiN structure showed the best improvement of thermal stability and suppression of abnormal oxidation although all kinds of structures showed improvement of sheet resistance. That is, Ti/Ni/TiN structure showed only 11 ohm/sq. in spite of 600 $^{\circ}C$, 30 min post silicidation annealing while Ni-only structure show 42 ohm/sq. Therefore, Ti/Ni/TiN structure is highly promising for nano-scale CMOS technology.
Nano-Scale CMOSFET에서 Contact Etch Stop Layer의 Mechanical Film Stress에 대한 소자특성 분석
나민기(Min-Ki Na),한인식(In-Shik Han),최원호(Won-Ho Choi),권혁민(Hyuk-Min Kwon),지희환(Hee-Hwan Ji),박성형(Sung-Hyung Park),이가원(Ga-Won Lee),이희덕(Hi-Deok Lee) 대한전자공학회 2008 電子工學會論文誌-SD (Semiconductor and devices) Vol.45 No.4
본 논문에서는 Contact Etch Stop Layer (CESL)인 nitride film의 mechanical stress에 의해 인가되는 channel stress가 소자특성에 미치는 영향에 대해 분석하였다. 잘 알려진 바와 같이 NMOS는 tensile stress와 PMOS에서는 compressive stress가 인가되었을 경우 drain current가 증가하였으며 그 원인을 체계적으로 분석하였다. NMOS의 경우 tensile stress가 인가됨으로써 back scattering ratio (rsat)의 감소와 thermal injection velocity (Vinj)의 증가로 인해 mobility가 개선됨을 확인하였다. 또한 rsat 의 감소는 온도에 따른 mobility의 감소율이 작고, 그에 따른 mean free path ( λO)의 감소율이 작기 때문인 것으로 확인되었다. 한편 PMOS의 compressive stress 경우에는 tensile stress에 비해 온도에 따른 mobility의 감소율이 크기 때문에 channel back scattering 현상은 심해지지만 source에서의 Vinj가 큰 폭으로 증가함으로써 mobility가 개선됨을 확인 할 수 있었다. 따라서 CES-Layer에 의해 인가된 channel stress에 따른 소자 특성의 변화는 inversion layer에서의 channel back scattering 현상과 source에서의 thermal injection velocity에 매우 의존함을 알 수 있다. In this paper, the dependence of MOSFET performance on the channel stress is characterized in depth. The tensile and compressive stresses are applied to CMOSFET using a nitride film which is used for the contact etch stop layer (CESL). Drain current of NMOS and PMOS is increased by inducing tensile and compressive stress, respectively, due to the increased mobility as well known. In case of NMOS with tensile stress, both decrease of the back scattering ratio (rsat) and increase of the thermal injection velocity (Vinj) contribute the increase of mobility. It is also shown that the decrease of the rsat is due to the decrease of the mean free path (λ?). On the other hand, the mobility improvement of PMOS with compressive stress is analyzed to be only due to the so increased Vinj because the back scattering ratio is increased by the compressive stress. Therefore it was confirmed that the device performance has a strong dependency on the channel back scattering of the inversion layer and thermal injection velocity at the source side and NMOS and PMOS have different dependency on them.
Nano scale PMOSFET에서 Channel Stress에 의한 DC 특성 및 Channel Back Scattering의 변화 관찰
나민기(Min-Ki Na),한인식(In-Shik Han),최원호(Won-Ho Choi),유욱상(Ook-Sang You),권혁민(Hyuk-Min Kwon),박성수,지희환(Hee-Hwan Ji),박성형(Sung-Hyung Park),이가원(Ga-Won Lee),이희덕(Hi-Deok Lee) 대한전자공학회 2007 대한전자공학회 학술대회 Vol.2007 No.11
In this paper, both current and channel back scattering on under the channel stress were characterized in depth. The tensile and compressive stresses were applied to PMOSFET using with a nitride film used for the contact etch stop layer (CESL). The subthreshold slope of PMOSFET under compressive stress is smaller than that under the tensile stress, which exhibits the lower off current of compressive stress than tensile stress. Although back scattering ratio (rsat) of compressive stress was larger than tensile stress, thermal injection velocity (Vinj) of compressive stress was much larger than tensile case, which results in larger Idsat for compressive stress case. It was confirmed that the drain current of the device with an uniaxial stress has a strong dependency on the subthreshold slope and thermal injection velocity at the source side.
Ar 이온빔 에칭에 의한 실리콘 Schottky 장벽 변화
지희환,박명철,왕진석 忠南大學校 産業技術硏究所 1998 산업기술연구논문집 Vol.13 No.2
The IBE(ion beam etching)-induced Schottky barrier variation which depends on various etching conditions such as ion energy, incident angle and etching time has been investigated using the voltage-current and capacitance-voltage characteristics of metal-etched silicon contacts. For ion beam etched n-type silicons, Schottky barrier is reduced in proportion to ion beam energy and the specific contact resistance is reduced by barrier loweing effects. Not only etching time but also incident angle of ion beam have an effect on barrier height. Also, ionized Ar?? beam shows larger barrier variation than neutral Ar beam Annealing in an N₂ ambient for 30 min was found to be effective in improving the diode characteristics of the etched samples, and a minimum annealing temperature to recover IBE-induced barrier variation relates to ion beam energy. Experimental results show that the minimum annealing temperatures are 1000℃ for 1KeV, 6000℃ for 500eV, respectively.