함정 전투체계에서 통합 통제 시스템의 고장 감내를 지원하기 위한 리더 선정 알고리즘 개발

서용진,조준영,김현수,고영근,김점수 한국군사과학기술학회 2019 한국군사과학기술학회지 Vol.22 No.3

The naval combat system is a distributed system in which various subsystems are integrated and operated together. The integrated management system(IMS) is a software system for systematically and consistently managing the application software which control and operate various devices in such a combat system. Since the malfunction or failure of such an IMS can disable the entire combat system, the IMS is more important than other application software of the combat system. In this paper, we propose a method to guarantee the stable and correct operation of the combat system. To this end, we propose a redundancy scheme composed of one leader and several followers so as to tolerate the failure situation of the IMS. We also propose a leader selection algorithm to select a new leader when the leader fails and can no longer perform its role. To verify the validity of the study, we verify the fault tolerance behavior of the system and the accuracy of the leader selection algorithm.

필터링에 의한 실리카 슬러리 연마제의 재활용에 관한 연구

서용진,박성우,이우선 대한전기학회 2004 전기학회논문지C Vol.53 No.11-C

In this paper, in order to reduce the high COO (cost of ownership) and COC (cost of consumables), we have collected the silica abrasive powders by filtering method after subsequent CMP (chemical mechanical polishing) process for the purpose of abrasives recycling. And then, we have studied the possibility of recycle of reused silica abrasive through the analysis of particle size distribution and FE-SEM (field emission-scanning electron microscope) measurements of abrasive powders. It was annealed the collected abrasive powders to promote the mechanical strength of reduced abrasion force. Finally, we compared the CMP characteristics between self-developed KOH-based silica abrasive slurry and original slurry. As our experimental results, we obtained the comparable rate of removal and good planarity with commercial products. Consequently, we can expect the saving of high cost slurry.

서브마이크론 MOSFET의 파라메터 추출 및 소자 특성 II -제작된 소자의 특성-

서용진,장의구 한국전기전자재료학회 1994 電氣電子材料學會誌 Vol.7 No.3

In this paper, we have fabricated short channel MOSFETs with these parameters to verify the validity of process parameters extraction by DTC method. The experimental results of fabricated short channel devices according to the optimal process parameters demonstrate good device characteristics such as good drain current-voltage characteristics, low body effects and threshold voltage of$\leq$+-.1.0V, high punch through and breakdown voltage of$\leq$12V, low subthreshold swing(S.S) values of$\leq$105mV/decade.

실리카 연마제가 첨가된 재활용 슬러리를 사용한 2단계 CMP 특성

서용진,이경진,최운식,김상용,박진성,이우선 한국전기전자재료학회 2003 전기전자재료학회논문지 Vol.16 No.9

Recently, CMP (chemical mechanical polishing) technology has been widely used for global planarization of multi-level interconnection for ULSI applications. However, COO (cost of ownership) and COC (cost of consumables) were relatively increased because of expensive slurry. In this paper, we have studied the possibility of recycle of roused silica slurry in order to reduce the costs of CMP slurry. The post-CMP thickness and within-wafer non-uniformity (WIWNU) wore measured as a function of different slurry composition. As an experimental result, the performance of reused slurry with annealed silica abrasive of 2 wt% contents was showed high removal rate and low non-uniformity. Therefore, we propose two-step CMP process as follows , In tile first-step CMP, we can polish the thick and rough film surface using remaked slurry, and then, in the second-step CMP, we can polish the thin film and fine pattern using original slurry. In summary, we can expect the saying of high costs of slurry.

실리콘 양자전자소자의 전류-전압 및 컨덕턴스 특성

서용진 한국전기전자학회 2019 전기전자학회논문지 Vol.23 No.3

The silicon-adsorbed oxygen(Si-O) superlattice grown by ultra high vacuum-chemical vapor deposition(UHV-CVD)was introduced as an epitaxial barrier for silicon quantum electron devices. The current-voltage (I-V) measurementresults show the stable and good insulating behavior with high breakdown voltage. It is apparent that the Si-Osuperlattice can serve as an epitaxially grown insulating layer as possible replacement of silicon-on-insulator(SOI). Thisthick barrier may be useful as an epitaxial insulating gate for field effect transistors(FETs). The rationale is that itshould be possible to fabricate a FET on top of another FET, moving one step closer to the ultimate goal of futuresilicon-based three-dimensional integrated circuit(3DIC). 초고진공 화학기상증착장치(UHV-CVD)에 의해 성장된 실리콘-흡착된 산소(Si-O) 초격자가 실리콘 양자전자소자를 위한에피택셜 장벽으로 소개되었다. 전류-전압 측정 결과 높은 브레이크다운 전압을 갖는 매우 안정하고 양호한 절연특성을 나타내었다. 에피택셜 성장된 Si-O 초격자는 SOI(silicon on insulator)를 대체할 수 있는 절연층으로도 사용될 수 있음을 보여준다. 이 두꺼운 장벽은 전계효과트랜지스터(FET)의 절연 게이트로 유용하게 사용될 수 있어 FET 위에 또 다른 FET를 제작할 수 있으므로 미래 실리콘계 3차원 집적회로의 궁극적인 목표에 한층 더 다가갈 수 있는 가능성을 보여주는 것이다.

물류이동거리 최소를 위한 유전자 알고리즘 기반 FAB Facility 배치

서용진,최진영 한국산업경영시스템학회 2016 한국산업경영시스템학회 학술대회 Vol.2016 No.추계

Application of Potential-pH Diagram and Potentiodynamic Polarization of Tungsten

서용진,이우선,Sung-Woo Park 한국전기전자재료학회 2006 Transactions on Electrical and Electronic Material Vol.7 No.3

The oxidizer-induced corrosion state and microstructure of surface passive metal-oxide layer greatly influenced on the removal rate of tungsten film according to the slurry chemical composition of different mixed oxidizers. In this paper, the actual polishing mechanism and pH-potential equilibrium diagram obtained from potentiodynamic polarization curve were electrochemically compared. An electrochemical corrosion effect implies that slurries with the highest removal rate (RR) have the high dissolution rate.

Twin-tub CMOS공정으로 제작된 서브마이크로미터 n채널 및 p채널 MOSFET의 특성

서용진,최현식,김상용,김태형,김창일,장의구 한국전기전자재료학회 1992 電氣電子材料學會誌 Vol.5 No.3

Twin-tub CMOS 공정에 의해 제작된 서브마이크로미터 채널길이를 갖는 n채널 및 p채널 MOSFET의 특성을 고찰하였다. n채널 및 p채널 영역에서의 불순물 프로파일과 채널 이온주입 조건에 따른 문턱전압의 의존성 및 퍼텐셜 분포를 SUPREM-II와 MINIMOS 4.0을 사용하여 시뮬레이션하였다. 문턱전압 조정을 위한 counter-doped 보론 이온주입에 의해 p채널 MOSFET는 표면에서 대략 0.15.mu.m의 깊이에서 매몰채널이 형성되었다. 각 소자의 측정 결과, 3.3[V] 구동을 위한 충분한 여유를 갖는 양호한 드레인 포화 특성과 0.2[V]이하의 문턱전압 shift를 갖는 최소화된 짧은 채널 효과, 10[V]이상의 높은 펀치쓰루 전압과 브레이크다운 전압, 낮은 subthreshold 값을 얻었다.

고전압 정전기 보호용 DDDNMOS 소자의 더블 스냅백 방지를 위한 최적의 이온주입 조건 결정

서용진,Seo, Yong-Jin 한국전기전자학회 2022 전기전자학회논문지 Vol.26 No.3

Process and device simulations were performed to determine the optimal ion implantation conditions to prevent double snapback of high voltage operating DDDNMOS (double diffused drain N-type MOSFET) device for ESD protection. By examining the effects of HP-Well, N^- drift and N⁺ drain ion implantation on the double snapback and avalanche breakdown voltages, it was possible to prevent double snapback and improve the electrostatic protection performance. If the ion implantation concentration of the N^- drift region rather than the HP-Well region is optimally designed, it prevents the transition from the primary on-state to the secondary on-state, so that relatively good ESD protection performance can be obtained. Since the concentration of the N^- drift region affects the leakage current and the avalanche breakdown voltage, in the case of a process technology with an operating voltage greater than 30V, a new structure such as DPS or colligation of optimal process conditions can be applied. In this case, improved ESD protection performance can be realized.

CMP 공정 결함 및 방지에 관한 연구

서용진 대불대학교 2000 論文集 Vol.6 No.1

STI(Shallow Trench Isolation)-CMP(Chemical Mechanical Polishing) process is gradually substituting for LOCOD(Local Oxidation of Silicon) process to be available below sub-0.5um technology and to get planarization. However STI-CMP process has various defects such as nitirde residue, torn oxide defect, damage of active region, etc. also, the removal rates of each thin films is STI-CMP was not equal, that is, the damage was occurred in the active device area as a result of excessive CMP process, and the nitride film was remained on the active device area in the case of insufficient CMP process. In this work, the various defects induced by CMP process was introduced. and the above mentioned problems of CMP process was explained in detail. Finally, the guideline of future CMP process was presented to reduce the effects of thees defects.