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산화막 CMP 공정에서 슬러리 온도 변화에 따른 연마 특성
고필주,박성우,김남훈,서용진,이우선,Ko, Pil-Ju,Park, Sung-Woo,Kim, Nam-Hoon,Seo, Yong-Jin,Lee, Woo-Sun 한국전기전자재료학회 2005 전기전자재료학회논문지 Vol.18 No.3
To investigate the effects of slurry temperature on the chemical mechanical polishing(CMP) performance of oxide film with silica and ceria slurries, we have studied slurry properties as a function of different slurry temperature. Also, the effects of each input parameter of slurry on the oxide CMP characteristics were investigated. The pH showed a slight tendency of decrease, the conductivity in slurries showed an increased tendency, the mean particle size in slurry decreased, and the zeta potential of slurry decreased with temperature. The removal rates significantly increased and maintained at the specific levels over 4$0^{\circ}C$. The better surface morphology of oxide films could be obtained at 40 $^{\circ}C$ of silica slurry and at 90 $^{\circ}C$ of ceria slurry. It is found that the CMP performance of oxide film could be significantly improved or controlled by change of slurry temperature.
Damascene 공정을 이용한 Pb(Zr,Ti)O₃ 캐패시터 제조 연구
고필주(Pil-Ju Ko),이우선(Woo-Sun Lee) 대한전기학회 2006 대한전기학회 학술대회 논문집 Vol.2006 No.10
The ferroelectric materials of the PZT, SBT attracted much attention for application to ferroelectric random access memory (PRAM) devices. Through the last decade, the lead zircon ate titanate (PZT) is one of the most attractive perovskite-tvpe materials for the ferroelectric products due to its higher remanant polarization and the ability to withstand higher coercive fields. FRAM has been currently receiving increasing attention for one of future memory devices due to its ideal memory properties such as non-volatility, high charge storage, and faster switching operations. In this study, we first applied the damascene process using chemical mechanical polishing (CMP) to the fabricate the Pb<SUB>1.1</SUB> (Zr<SUB>0.52</SUB>Ti<SUB>0.48</SUB>)O₃ thin film capacitor in order to solve the problems of plasma etching such as low etching profile and ion charging. The structural characteristics were compared with specimens before and after CMP process of PZT films. The scanning electron microscopy (SEM) analysis was performed to compare the morphology surface characteristics of Pb<SUB>1.1</SUB>(Zr<SUB>0.52</SUB>Ti<SUB>0.48</SUB>)O₃ capacitors. The densification by the vertical sidewall patterning and charging-free ferroelectric capacitor could be obtained by the damascene process without remarkable difference of the characteristics.
고필주(Pil-Ju Ko),김남훈(Nam-Hoon Kim),이우선(Woo-Sun Lee) 대한전기학회 2006 대한전기학회 학술대회 논문집 Vol.2006 No.7
Platinum is a candidate of top and bottom electrode in ferroelectric random access memory and dynamic random access memory. High dielectric materials and ferroelectric materials were generally patterned by plasma etching, however, the low etch rate and low etching profile were repoted. We proposed the damascene process of high dielectric materials and ferroelectric materials for patterning process through the chemical mechanical polishing process. At this time, platinum as a top electrode was used for the stopper for the end-point detection as Igarashi model. Therefore, the control of removal rate in platinum chemical mechanical polishing process was required. In this study, an addition of H₂O₂ oxidizer to alumina slurry could control the removal rate of platinum. The removal rate of platinum rapidly increased with an addition of 10wt% H₂O₂ oxidizer from 24.81㎚/min to 113.59㎚/min. Within-wafer non-uniformity of platinum after chemical mechanical polishing process was 9.93% with an addition of 5wt% H₂O₂ oxidizer.
고필주(Pil-Ju Ko),김남훈(Nam-Hoon Kim),이우선(Woo-Sun Lee) 대한전기학회 2006 대한전기학회 학술대회 논문집 Vol.2006 No.7
Pb(Zr,Ti)O₃ is one of the most attractive ferroelectric materials for realizing the FeRAM due to its higher remanant polarization and the ability to withstand higher coercive fields. Generally, the ferroelectric materials were patterned by a plasma etching process for high-density FeRAM. The applicable possibility of CMP process to pattern Pb(Zr,Ti)O₃ instead of plasma etching process was investigated in our previous study for improvement of an angled sidewall which prevents the densification of ferroelectric memory and is apt to receive the plasma damage. Our previous study showed that good removal rate with the excellent surface roughness compared to plasma etching process were obtained by CMP process for the patterning of Pb(Zr,Ti)O₃. The suitable selectivity to TEOS without any damage to the structural property of Pb(Zr,Ti)O₃ was also guaranteed. In this study, the removal mechanism of Pb<SUB>1.1</SUB>(Zr<SUB>0.52</SUB>Ti<SUB>0.48</SUB>)O₃ coated by sol-gel method was investigated. Surface analysis of polished specimens at the best and worst conditions was carried out by XPS.
Rapid Laser Annealing of Cu(In,Ga)Se2 Thin Films by Using a Continuous Wave Nd:YAG Laser (0= 532 nm)
김남훈,고필주,조금배,박찬일 한국물리학회 2017 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.70 No.8
Rapid laser annealing of a Cu(In,Ga)Se2 (CIGS) thin film absorber was proposed and demonstrated using a continuous 532-nm Nd:YAG laser, following sputtering with Cu0.9In0.7Ga0.3Se2 target, because the conventional annealing temperature for improving the crystallinity of CIGS thin films is higher than the decomposition temperature of a typical flexible polymer substrate. When the laser optical power was incrementally increased over the range from 2.00 to 3.00 W, for 200 s, XRD patterns showed the formation of CIGS chalcopyrite (112), (220/204), and (312/116) phases in the laser-annealed CIGS thin films, at laser optical powers of 2.75 and 3.00 W. The band gaps of these laser-annealed CIGS thin films varied from 1.45 to 1.83 eV and depended on the laser optical power. The relative mean absorbance of the laser-annealed CIGS thin films was 1.806, suggesting that approximately 98.44% of the incident photons were observed by the 600-nm-thick film in the visible spectral region. Conductivity type varied with changes in the laser optical power. The resistivities of the laser-annealed CIGS thin films were of order of 10−3 - 101 -cm.
고집적 메모리 커패시터의 Vertical Sidewall Patterning을 위한 BTO 박막의 CMP 특성
서용진,고필주,박성우,이강연,이우선 대한전기학회 2006 전기학회논문지C Vol.55 No.3(C)
- Most high-k materials are well known not to be etched easily, Some problems such as low etch rate poor sidewall angle, plasma damage, and process complexity were emerged from the high-density DRAM fabrication. Chemical mechanical polishing (CMP) by a damascene process was proposed to pattern this high-k material was polished with some commercial silica slurry as a function of pH variation. Sufficient removal rate with adequate selectivity to realize the pattern mask of tera-ethyl ortho-silicate (TEOS) film for the vertical sidewall angle were obtained. The changes of X-ray diffraction pattern and dielectric constant by CMP process were negligible. The planarization was also achieved for the subsequent multi-level processes. Our new CMP approach will provide a guideline for effective patterning of high-k material by CMP technique.
2차원 층상 구조 전이금속 칼코겐화합물의 레이저 식각에 의한 직접-간접 띠간격 구조 연구
문은아,고필주,Moon, Eun-A,Ko, Pil-Ju 한국전기전자재료학회 2016 전기전자재료학회논문지 Vol.29 No.9
Single-layered transition metal dichalcogenides (TMDs) exhibit more interesting physical properties than those of bulk TMDs owing to the indirect to direct bandgap transition occurring due to quantum confinement. In this research, we demonstrate that layer-by-layer laser etching of molybdenum diselenide ($MoSe_2$) flakes could be controlled by varying the parameters employed in laser irradiation (time, intensity, interval, etc.). We observed a dramatic increase in the photoluminescence (PL) intensity (1.54 eV peak) after etching the samples, indicating that the removal of several layers of $MoSe_2$ led to a change from indirect to direct bandgap. The laser-etched $MoSe_2$ exhibited the single $MoSe_2$ Raman vibration modes at ${\sim}239.4cm^{-1}$ and ${\sim}295cm^{-1}$, associated to out-of-plane $A_{1g}$ and in-plane ${E^1}_{2g}$ Raman modes, respectively. These results indicate that controlling the number of $MoSe_2$ layers by laser etching method could be employed for optimizing the performance of nano-electronic devices.