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      • SCIESCOPUS

        A digital technique for diagnosing interconnect degradation by using digital signal characteristics

        Lee, J.,Kwon, D. Mackintosh Publications] 2017 Microelectronics Journal Vol.60 No.-

        <P>Interconnects are responsible for mechanical and electrical connection of electronic components, and they are essential in the operation of electronic components. Suess-induced substances can degrade interconnect properties and functions because they exert stress conditions such as chemical stress to interconnects. Chemical stress from moisture or contaminants causes corrosion to interconnects, and as a result interconnect failures occur in which the interconnects cannot conduct the intended functions. Since interconnect failure disturbs the connection between electronic components, it can cause ensuing failures such as electronic failures. Many approaches have been developed to detect interconnect degradation and prevent ensuing failures. In industrial fields, approaches to detect interconnect failure based on DC resistance have been widely used since DC resistance can capture electrical discontinuity. However, approaches based on DC resistance have a problem because they usually require additional sensing devices or circuitries. This study introduces a new approach to interconnect failure detection using digital signals. The proposed method using digital signals detects interconnect failures without additional sensing devices. Interconnect failure detection can be conducted by monitoring and analyzing the signal characteristics of the transmitted signal because digital signal is continuously generated and transmitted in electronics to control the electronic components and communicate between the components, and also because digital signal is in high-speed, the characteristics of the transmitted digital signal is deteriorated by physical damages on transmitted circuitries such as corrosion on interconnects. We designed accelerated life tests (ALT) of interconnects under chemical stress in order to demonstrate failure detection capability. While solder joints were exposed to chemical stress and corroded gradually, the digital signal characteristics were monitored with DC resistance simultaneously and analyzed by Sequential Probability Ratio Test (SPAT) to determine the times-to-failure of the solder joints. The test results demonstrated that the proposed approach based on digital signal can detect interconnect failures earlier than the DC resistance, which means that the proposed approach can enable electronic components to detect interconnect failures by themselves.</P>

      • Reliability assessment on electrical interconnects by using resonance in the high frequency regime

        Tae Yeob Kang(강태엽),Joonki Min(민준기),Donghwan Seo(서동환),Taek-Soo Kim(김택수) 대한기계학회 2021 대한기계학회 춘추학술대회 Vol.2021 No.4

        Recently, there has been growing interest in monitoring the ongoing health of products and systems in order to predict component failures in advance of the catastrophic one. Even though PHM technologies have been well developed regarding solder-joint interconnections, in-depth studies on the failure initiation signals from bond wire interconnects are needed. In this paper, we address the technical issues of bond wire interconnects on the high frequency performance and failure initiation under severe temperature environments. We paid attention to the certain scattering parameter(S-parameter) patterns of each defective interconnect to provide information about both the severity of defects and the causes. S-parameters describe the electrical behavior of electrical networks when undergoing various steady state stimuli by electrical signals. Many electrical properties of networks of components (inductors, capacitors, resistors) may be expressed using S-parameters. Also, the S-parameter measurements using network analyzers are the most basic work of RF engineering. One of the basic tools in the RF design process is the use of S-parameter measurements. These measurements can be used in today’s computer-aided design (CAD) tools as part of the circuit-simulation process. S-parameters describe a component as a black box and are used to emulate behavior of electronic components over a range of frequencies. Thus, it would be highly convenient if the defects could be detected and analyzed by the s-parameter measurement itself. Therefore, it would be convenient if performance variation and crack initiation would be shown with the s-parameter alone. In this study, we show the performance variation of bond wire interconnects with S parameter supported by the impedance modeling. The model is verified by ADS simulation. Also, it is suggested that insertion loss can be a useful prognostics factor. This paper provides mechanical and electrical understanding of the behaviors of bond wire interconnects under thermal cyclings. The resonance movement with the crack propagation is compared to DC resistance measurement results. As shown in Figure 1, while the resonance peaks move several hundred MHz as the thermal cycle increases, the DC resistance doesn’t change. Even right before the failure, DC resistance doesn’t show any precursor. However, the resonance frequency depicts the changes caused by the beginning, development and the end of the failure. Even though many researchers have suggested serial ohmic resistance measurements, joint time-frequency domain reflectometry and S-parameters as PHM tools for interconnects such as solder joints and a through-silicon via(TSV), we suggest the resonance frequency as an effective failure indication for bond wire interconnects. The aforementioned resonance movement with the crack propagation is compared to DC resistance measurement results with the 10 mm wire case. While the resonance peaks move several hundred MHz as the thermal cycle increases, the DC resistance doesn’t change. Even right before the failure, DC resistance doesn’t show any precursor. However, the resonance frequency depicts the changes caused by the beginning, development and the end of the failure. Even though many researchers have suggested serial ohmic resistance measurements, joint time-frequency domain reflectometry and S-parameters as PHM tools for interconnects such as solder joints and a through-silicon via(TSV), we suggest the resonance frequency as an effective failure indication for bond wire interconnects. Experimental results show scanning electron microscope(SEM) images of the bond wire specimen after the failure which occurred at the neck. The bond wire loop did not remain the original shape after the break because of the remaining stress in the wire. The bonding area was left on the pad.

      • KCI등재

        고체산화물 연료전지 연결재용 세라믹 소재

        박범경,송락현,이승복,임탁형,박석주,박종욱,이종원,Park, Beom-Kyeong,Song, Rak-Hyun,Lee, Seung-Bok,Lim, Tak-Hyoung,Park, Seok-Joo,Park, Chong-Ook,Lee, Jong-Won 한국세라믹학회 2014 한국세라믹학회지 Vol.51 No.4

        An interconnect in solid oxide fuel cells (SOFCs) electrically connects unit cells and separates fuel from oxidant in the adjoining cells. The interconnects can be divided broadly into two categories - ceramic and metallic interconnects. A thin and gastight ceramic layer is deposited onto a porous support, and metallic interconnects are coated with conductive ceramics to improve their surface stability. This paper provides a short review on ceramic materials for SOFC interconnects. After a brief discussion of the key requirements for interconnects, the article describes basic aspects of chromites and titanates with a perovskite structure for ceramic interconnects, followed by the introduction of dual-layer interconnects. Then, the paper presents protective coatings based on spinel-or perovskite-type oxides on metallic interconnects, which are capable of mitigating oxide scale growth and inhibiting Cr evaporation.

      • KCI등재

        Analysis of read speed latency in 6T-SRAM cell using multi-layered graphene nanoribbon and cu based nano-interconnects for high performance memory circuit design

        Sandip Bhattacharya,Mohammed Imran Hussain,John Ajayan,Shubham Tayal,Louis Maria Irudaya Leo Joseph,Sreedhar Kollem,Usha Desai,Syed Musthak Ahmed,Ravichander Janapati 한국전자통신연구원 2023 ETRI Journal Vol.45 No.5

        In this study, we designed a 6T-SRAM cell using 16-nm CMOS process and analyzed the performance in terms of read-speed latency. The temperaturedependent Cu and multilayered graphene nanoribbon (MLGNR)-based nanointerconnect materials is used throughout the circuit (primarily bit/bit-bars [red lines] and word lines [write lines]). Here, the read speed analysis is performed with four different chip operating temperatures (150K, 250K, 350K, and 450K) using both Cu and graphene nanoribbon (GNR) nano-interconnects with different interconnect lengths (from 10 μm to 100 μm), for reading-0 and reading-1 operations. To execute the reading operation, the CMOS technology, that is, the16-nm PTM-HPC model, and the16-nm interconnect technology, that is, ITRS-13, are used in this application. The complete design is simulated using TSPICE simulation tools (by Mentor Graphics). The read speed latency increases rapidly as interconnect length increases for both Cu and GNR interconnects. However, the Cu interconnect has three to six times more latency than the GNR. In addition, we observe that the reading speed latency for the GNR interconnect is ~10.29 ns for wide temperature variations (150K to 450K), whereas the reading speed latency for the Cu interconnect varies between ~32 ns and 65 ns for the same temperature ranges. The above analysis is useful for the design of next generation, high-speed memories using different nano-interconnect materials.

      • 상호연계성에 기초한 한국군 군사교리 발전방안에 관한 연구

        전정배 ( Jeon Jeong-bae ),박효선 ( Park Hyo-sun ) 한국군사학회 2021 군사논단 Vol.108 No.-

        The objective of this study was to examine military doctrine which occupies a crucial portion in the innovation of ROK armed forces from the perspective of concept, and then present an effective developmental plan of military doctrine. For this, In order to verify the interconnectivity of military doctrine, this study concentrated upon the examination of 『Joint Operation』 of Joint Manual and ‘Operational Principles’ contained in the basic doctrine of Army, Navy, Air Force and Marine Corps from the perspective of joint operation. Regarding the interconnectivity of military doctrine for the execution of combined operation, this study comparatively analyzed ‘warfighting functions’ which are contained in US Army’s 『Operation』and ROK Army’s 『Ground Operation』and most frequently and commonly used in the execution of operation. Based on above study findings, the developmental plans of military doctrine of ROK armed forces from interconnectivity is as follows: First, it is necessary for the research institutes of Army, Navy, Air Force and Marine Corps of ROK armed forces to establish a system to increase the interconnectivity of military doctrine for an effective joint operation. For this, it is necessary to organize institutes and experts in the research of military doctrine, establish a joint research system, and prepare a system for smooth control, adjustment and cooperation. Second, it is necessary to work out a combined doctrine for the execution of effective combined operation. When considering future war in the Korean Peninsula, the importance of combined operation will increase all the more in the future and an effective combined operation, on the other hand, needs to increase the interconnectivity of military doctrine. This study seems to be significant in that it proposed a practical research plan of military doctrine based on interconnectivity which could function as the base of military power use, when researches on military doctrine of ROK armed forces are at primary level. However, this study could not what is a proper level of maintaining interconnectivity of military doctrine. In addition, this study has limitations in proposing what contents must be included in combined doctrine and what level must be maintained for proper interconnectivity. Therefore, the author hopes follow-up studies will active discussions and researches on the level of interconnectivity, the scope of manuals, and the contents of concept paper will be carried out in the future, together with many discussions on combined doctrine.

      • SCOPUSKCI등재

        Models of Interconnection in Telecommunications

        Sang Taek Kim,Hyeong-Chan Kim 서울대학교 경제연구소 2001 Seoul journal of economics Vol.14 No.3

        We proposed and utilized a simple model to review relay interconnection literatures. Without any complications of scale economies and opportunity costs, marginal cost pricing of interconnection charge is optimal. When incumbent sets the interconnection charge, it may or may not foreclose entrants depending upon degree of entrant's efficiency and forms of interconnection charge. When there are opportunity costs for incumbent to interconnect, then opportunity cost should be paid by the entrant according to the efficient component pricing rule. When there are economies of scale, Ramsey pricing comes to rescue. In an extension of Ramsey spirit, the global price caps are suggested. Next, we have reviewed the current status of the two-way access theory. First, a case of collusive retail prices has been presented even when the market competition exists between symmetric networks. In this case, the use of two-part tariffs or price discrimination can help, as they enable firms to compete in market shares without affecting their access payments. Various types of Internet interconnection are presented along with main results by Laffont, Marcus, Rey and Tirole (2001a, b) on the pricing issues of Internet interconnection.

      • SCISCIESCOPUS

        Highly conductive and stable Mn<sub>1.35</sub>Co<sub>1.35</sub>Cu<sub>0.2</sub>Y<sub>0.1</sub>O<sub>4</sub> spinel protective coating on commercial ferritic stainless steels for intermediate-temperature solid oxide fuel cell interconnect applications

        Thaheem, Imdadullah,Joh, Dong Woo,Noh, Taimin,Lee, Kang Taek Elsevier 2019 International journal of hydrogen energy Vol.44 No.8

        <P><B>Abstract</B></P> <P>Chromia scale growth and Cr evaporation of ferritic stainless steel interconnects are known to be major causes of serious degradation of the solid oxide fuel cell (SOFC) stack. The development of suitable ceramic coating materials on the metallic interconnects has been demonstrated as an effective way to address these challenges. Herein, we developed a Mn<SUB>1.35</SUB>Co<SUB>1.35</SUB>Cu<SUB>0.2</SUB>Y<SUB>0.1</SUB>O<SUB>4</SUB> (MCCY) spinel material via a facile glycine-nitrate process as a protective coating on a metallic interconnect (SUS 441). Crystal structure and surface charge state analysis of the MCCY material revealed that co-doping of Y and Cu into the (Mn,Co)<SUB>3</SUB>O<SUB>4</SUB> spinel resulted in redistribution of the Mn ions (Mn<SUP>3+</SUP> and Mn<SUP>4+</SUP>) into the octahedral site, which increased the electrical conduction by enhanced small polaron hopping. Accordingly, the MCCuY-coated interconnect exhibited ∼8 times lower area specific resistance (ASR) than that of the undoped Mn<SUB>1.5</SUB>Co<SUB>1.5</SUB>O<SUB>4</SUB> (MCO) coated interconnect. Moreover, time-dependent ASR behavior of MCCuY-coated sample was monitored in-situ using electrochemical impedance spectroscopy at 650 °C, showing excellent stability with no observable change for >1000 h, while the ASR of the MCO-coated sample was raised by ∼71%. After 1000 h operation, we found strong adhesion between the MCCuY coating and the metallic interconnect as well as remarkably restricted Cr diffusion into the coating layer. Furthermore, the parabolic constant associated with the oxidation kinetics of the MCCuY-coated substrate (8.25 × 10<SUP>−11</SUP> mg<SUP>2</SUP> cm<SUP>−4</SUP> s<SUP>−1</SUP>) was ∼1 order of magnitude lower than that of the MCO-coated one (7.34× 10<SUP>−10</SUP> mg<SUP>2</SUP> cm<SUP>−4</SUP> s<SUP>−1</SUP>) at 650 °C after 1000 h measurement. These results demonstrate that the MCCuY is a highly promising coating material of metallic interconnects for intermediate-temperature SOFC applications.</P> <P><B>Highlights</B></P> <P> <UL> <LI> A MCCuY spinel material is developed as a metallic interconnect protective coating. </LI> <LI> The MCCuY-coating exhibits ∼8 times lower ASR compared to the undoped MCO-coating. </LI> <LI> The MCCuY-coated sample shows excellent stability without degradation for >1000 h. </LI> <LI> The oxidation kinetics of the MCCuY-coating is ∼1 order lower than MCO-coating. </LI> </UL> </P> <P><B>Graphical abstract</B></P> <P>[DISPLAY OMISSION]</P>

      • Cu- and Ni-doped Mn<sub>1.5</sub>Co<sub>1.5</sub>O<sub>4</sub> spinel coatings on metallic interconnects for solid oxide fuel cells

        Park, B.K.,Lee, J.W.,Lee, S.B.,Lim, T.H.,Park, S.J.,Park, C.O.,Song, R.H. Pergamon Press ; Elsevier Science Ltd 2013 INTERNATIONAL JOURNAL OF HYDROGEN ENERGY - Vol.38 No.27

        An interconnect in solid oxide fuel cells electrically connects unit cells and separates fuel from oxidant in the adjoining cells. Metallic interconnects are usually coated with conductive oxides to improve their surface stability and to mitigate chromium poisoning of a cathode. In this study, Mn<SUB>1.5</SUB>Co<SUB>1.5</SUB>O<SUB>4</SUB> (MCO) spinel oxides doped with Cu and Ni are synthesized and applied as protective coatings on a metallic interconnect (Crofer 22 APU). Doping of Cu and Ni into MCO improves sintering characteristics as well as electrical conductivity and thermal expansion match with the Crofer interconnect. The dense layers of Cu- and Ni-doped MCOs are fabricated on the interconnects by a slurry coating process and subsequent heat-treatment. The coated interconnects exhibit area-specific resistances as low as 13.9-17.6 mΩ cm<SUP>2</SUP> at 800 <SUP>o</SUP>C. The Cu-doped MCO coating acts as an effective barrier to evaporation and migration of Cr-containing species from the interconnect, thereby reducing Cr poisoning of a cathode.

      • Protective coating based on manganese–copper oxide for solid oxide fuel cell interconnects: Plasma spray coating and performance evaluation

        Waluyo, Nurhadi S.,Park, Seong-Sik,Song, Rak-Hyun,Lee, Seung-Bok,Lim, Tak-Hyoung,Hong, Jong-Eun,Ryu, Kwang Hyun,Bin Im, Won,Lee, Jong-Won Elsevier 2018 Ceramics international Vol.44 No.10

        <P><B>Abstract</B></P> <P>A solid oxide fuel cell (SOFC) stack requires metallic interconnects to electrically connect unit cells, while preventing fuel from mixing with oxidant. During SOFC operations, chromia scales continue to grow on the interconnect surfaces, resulting in a considerable increase of interfacial resistance, and at the same time, gaseous Cr species released from the chromia scales degrades the cathode performance. To address these problems, in this study, protective Mn<SUB>2</SUB>CuO<SUB>4</SUB> coatings are fabricated on metallic interconnects (Crofer 22 APU) <I>via</I> a plasma spray (PS) process. The PS technique involves direct spray deposition of molten Mn<SUB>2</SUB>CuO<SUB>4</SUB> onto the interconnect substrate and leads to the formation of high-density Mn<SUB>2</SUB>CuO<SUB>4</SUB> coatings without the need for post-heat-treatment. The thickness, morphology, and porosity of the PS-Mn<SUB>2</SUB>CuO<SUB>4</SUB> coating are found to depend on the processing parameters, including plasma arc power, gas flow rate, and substrate temperature. The PS-Mn<SUB>2</SUB>CuO<SUB>4</SUB> coating fabricated with optimized parameters is completely impermeable to gases and has high adhesion strength on the interconnect substrate. Furthermore, no resistive chromia scales are formed at the coating/substrate interface during the PS process. As a result, the PS-Mn<SUB>2</SUB>CuO<SUB>4</SUB>-coated interconnects show a very low area-specific resistance below 10 mΩ cm<SUP>2</SUP> at 800 °C in air and excellent stability during both continuous operation and repeated thermal cycling. This work suggests that an appropriate combination of the material and coating process provides a highly effective protective layer for SOFC interconnects.</P>

      • KCI등재

        A Study on the Reliability Evaluation for Interconnecting Power Systems in Northeast Asia

        崔在錫(Jae-Seok Choi),車濬敏(Jun-Min Cha) 대한전기학회 2008 전기학회논문지 Vol.57 No.7

        This paper proposes a reliability evaluation for interconnection planning using a tie line equivalent assisting generator model (TEAG) that considers the uncertainties of the interconnected transmission systems and the tie lines. Development of this model was triggered by the need to perform probabilistic reliability evaluations on the NEAREST (North East Asia Region Electric Systems Tied) interconnection. The TEAG is the basis for the newly developed interconnection systems reliability evaluation computer program, NEAREL. The model is capable of considering uncertainties associated with generators, tie lines, and the tied grids. Reliability evaluations for six interconnection scenarios involving the power systems of six countries in the Asian north eastern region were performed using NEAREL. Sensitivity analysis was used to determine reasonable tie line capacities for three interconnected country scenarios of the six countries. Test results and summarized comments of the scenarios are included in the paper.

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