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사이리스터 동작을 이용한 새로운 이중 게이트 트랜지스터
하민우,전병철,최연익,한민구 대한전기학회 2004 전기학회논문지C Vol.53 No.7(C)
A new 600 V dual gate transistor employing thyristor action, which incorporates floating PN junction and trench gate IGBT, is proposed to improve the forward current-voltage characteristics and the short circuit ruggedness. Our two-dimensional numerical simulation shows that the proposed device exhibits low forward voltage drop and eliminates the snapback phenomena compared with conventional trench gate IGBT and EST. The proposed device achieves high current saturation characteristics by separating floating N+ emitter and cathode. The proposed device achieves low saturation current value compared with conventional devices, and the short-circuit ruggedness is improved. The proposed device may be suitable for the use of high voltage switching applications.
하민우,오재근,최연익,한민구 대한전기학회 2003 전기학회논문지C Vol.54 No.9
We have proposed the junction termination structure of IGBT (Insulated Gate Bipolar Transistor) by employing trench and FLR (Field Limiting Ring), which decrease the junction termination area at the same breakdown voltage. Our proposed junction termination structure, trench FLR is verified by numerical simulator MEDICI. In 600V rated device, the junction termination area is decreased 20% compared with that of the conventional FLR structure. The breakdown voltage of trench FLR with 4 trenches is 768 V, 99 % of ideal parallel-plane junction(1-D) $BV_ceo$.
X7R 630 V급 적층 세라믹 커패시터의 전기적 특성에 미치는 테스트 픽스처의 영향
하민우,김태은,이준영,김민기,석오균 대한전기학회 2020 전기학회논문지 Vol.69 No.12
Electrical characteristics of multilayer ceramic capacitors (MLCCs) should be measured precisely because the equivalent series resistance (ESR) is considerably low. It is also difficult to measure impedance of the MLCCs at self resonance frequency due to its high parasitic resistance of the test environment. In this work, we investigated the capacitance, ESR, and dissipation factor of X7R 630 V, 0.47 μF MLCC with three-different environments using a probe station and two test fixtures (16334A and 16034E). The 16034E test fixture can be directly connected to the LCR meter without any cable. We measured two MLCCs from different two vendors named by MLCC type1 and type2, respectively. The ESR of the MLCC type1 was 4.3 Ω, 6.9 Ω, and 4.1 Ω at the AC effective voltage of 1 V and 1 kHz using the probe station, 16334A and 16034E test fixtures, respectively. The ESR of the MLCC type2 was 4.9 Ω, 5.3 Ω, and 3.8 Ω at the same condition using the probe station, 16334A and 16034E test fixtures, respectively. The tweezer test fixture (16334A) had a problem of parasitic resistance between contact in the fixture and electrode in the MLCC, which increased both ESR and DF. It was also difficult to extract self-resonant frequency using the tweezer test fixture because of high ESR
높은 항복 전압 특성을 가지는 이중 게이트 AlGaN/GaN 고 전자 이동도 트랜지스터
하민우,이승철,허진철,서광석,한민구 대한전기학회 2005 전기학회논문지C Vol.54 No.1(C)
We have proposed and fabricated a dual gate AlGaN/GaN high electron mobility transistor (HEMT), which exhibits the low leakage current and the high breakdown voltage for the high voltage switching applications. The additional gate between the main gate and the drain is specially designed in order to decrease the electric field concentration at the drain-side of the main gate. The leakage current of the proposed HEMT is decreased considerably and the breakdown voltage increases without sacrificing any other electric characteristics such as the transconductance and the drain current. The experimental results show that the breakdown voltage and the leakage current of proposed HEMT are 362 V and 75 nA while those of the conventional HEMT are 196 V and 428 nA, respectively.
하민우,공소정,이준영,김민기,석오균 대한전기학회 2023 전기학회논문지 Vol.72 No.11
Multilayer ceramic capacitors (MLCCs) have been used in various electronics including electric vehicles. Dielectric absorption of BaTiO3-based X7R MLCCs is reported in the manuscript. We reviewed the dielectric absorption in detail which was not DC or AC characteristics. We fabricated the X7R MLCCs and measured the devices using an LCR meter, a test fixture, and two source measure units. The dielectric absorption was measured in the fabricated devices. And then the ω0, Cd, and Rd were altered by rms voltage of AC signals. However, these were not affected by the DC voltage. The C∞ from atomic or molecular polarization was not altered by the Vrms and VDC which means this study is right. When the operating frequency of the X7R MLCCs is less than the frequency when the dielectric absorption activates, the capacitance reduces from C∞ + Cd to C∞. We should suppress the dielectric absorption of the MLCCs which generates from an insulating layer. The dielectric absorption can be used to determine the mass production of commercial MLCCs.
높은 항복 전압 특성을 가지는 이중 게이트 AlGaN/GaN 고 전자 이동도 트랜지스터
하민우,이승철,허진철,서광석,한민구,Ha Min-Woo,Lee Seung-Chul,Her Jin-Cherl,Seo Kwang-Seok,Han Min-Koo 대한전기학회 2005 전기학회논문지C Vol.54 No.1
We have proposed and fabricated a dual gate AlGaN/GaN high electron mobility transistor (HEMT), which exhibits the low leakage current and the high breakdown voltage for the high voltage switching applications. The additional gate between the main gate and the drain is specially designed in order to decrease the electric field concentration at the drain-side of the main gate. The leakage current of the proposed HEMT is decreased considerably and the breakdown voltage increases without sacrificing any other electric characteristics such as the transconductance and the drain current. The experimental results show that the breakdown voltage and the leakage current of proposed HEMT are 362 V and 75 nA while those of the conventional HEMT are 196 V and 428 nA, respectively.
ESD Degradation Analysis of Poly-Si N-type TFTs by Employing a Transmission Line Pulser Test
하민우,Byung-Chul Jeon,Min-Koo Han,Yearn-Ik Choi 한국물리학회 2004 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.44 No.1
The degradation mechanisms of poly-Si N-type thin-film transistors (TFTs) due to electrostatic discharge (ESD) stress are reported based on transmission line pulser (TLP) tests. The ESD pulse generated by the TLP is applied to the drain and the gate of the poly-Si TFT. Experimental results show that the degradations caused by ESD stress on the drain can be classified into three different failure modes depending on the strength of the ESD stress: the degradation, the partial failure, and the complete failure modes. A poly-Si TFT with a lightly doped drain (LDD) is more robust to the ESD stress on the drain than a poly-Si TFT without a LDD. The ESD stress on the gate results in a shift of the threshold voltage, a decrease in the on-current and an increase in the off-current. The ESD stress on the gate of a poly-Si TFT increases the gate-oxide fixed trap charges, which was verified by capacitance-voltage measurements.
얕은 트렌치와 전계 제한 확산 링을 이용한 접합 마감 설계의 1200 V급 소자에 적용
하민우,오재근,최연익,한민구 대한전기학회 2004 전기학회논문지C Vol.53 No.6(C)
We have proposed the junction termination design employing shallow trench filled with silicon dioxide and field limiting ring (FLR). We have designed trenches between P+ FLRs to decrease the junction termination radius without sacrificing the breakdown voltage characteristics. We have successfully fabricated and measured improved breakdown voltage characteristics of the proposed device for 1200 V-class applications. The junction termination radius of the proposed device has decreased by 15 % ∼ 21 % compared with that of the conventional FLR at the identical breakdown voltage. The junction termination area of the proposed device has decreased by 37.5 % compared with that of the conventional FLR. The breakdown voltage of the proposed device employing 7 trenches was 1156 V, which was 80 % of the ideal parallel-plane junction breakdown voltage.