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        복수의 해쉬 함수를 이용한 병렬 IP 어드레스 검색 구조

        정여진,이보미,임혜숙 한국통신학회 2004 韓國通信學會論文誌 Vol.29 No.2B

        IP 주소 검색은 인터넷 라우터의 필수적인 기능 중에 하나인 동시에 인터넷 라우터의 전체 성능을 결정하는 중요한 요소이다. 현재 인터넷 라우터에 연결된 네트워크 종류의 증가로 라우팅 테이블 엔트리 수가 급격히 증가하고 있으며, 인터넷 트래픽 역시 빠르게 증가하고 있어 효율적인 라우팅 테이블의 검색이 요구된다. 그 동안 빠른 주소 검색을 위해 다양한 알고리즘들과 검색 방식들이 제안되었지만 대부분 메모리 사이즈나 업데이트 등의 실용적인 측면에 대한 고려가 부족하였다. 본 논문에서는 IP 주소 검색을 위한 실용적인 하드웨어 구조를 제안한다. 제안된 구조는 multiple hashing을 적용한 병렬 IP 주소 검색 구조로, 메모리 사이즈나 메모리 검색 횟수, 업데이트에 있어서 장점을 가진다. 본 논문에서는 제안한 하드웨어 구조의 성능을 평가하기 위하여 MAE-WEST 라우터를 통과한 실제 데이터를 사용하여 시뮬레이션을 수행하고, 이를 통해 203kbytes의 메모리와 200여개의 엔트리를 저장할 수 있는 TCAM을 사용하여 한번의 메모리 접근으로 주소 검색이 가능함을 보였다. Address lookup is one of the most essential functions of the Internet routers and a very important feature in evaluating router performance. Due to the facts that the Internet traffic keeps growing and the number of routing table entries is continuously growing, efficient address-lookup mechanism is indispensable. In recent years, various fast address-lookup schemes have been proposed, but most of those schemes are not practical in terms of the memory size required for routing table and the complexity required in table update In this paper, we have proposed a parallel IP address lookup architecture based on multiple hashing. The proposed scheme has advantages in required memory size, the number of memory accesses, and table update. We have evaluated the performance of the proposed scheme through simulation using data from MAE-WEST router. The simulation result shows that the proposed scheme requires a single memory access for the address lookup of each route when 203kbytes of memory and a few-hundred-entry TCAM are used.

      • KCI등재

        Preliminary Evidence for the Psychophysiological Effects of a Technological Atmosphere in E-Commerce

        정여진,이유리,김하연,윤소연 한국감성과학회 2018 감성과학 Vol.21 No.1

        As information and communication technologies (ICTs) become more advanced, consumers are able to experienceretailing activities such as searching for products and services in online retail shops and for Internet-exclusivebranded contents. Specifically, fashion retailers are facing the need to develop more novel experiential design thanone another to maximize customers’ experience in Internet websites and secure sustainable competency. Confirmingmethods of organic integration of experiential and visual features of both online and mobile channels is an importantaspect of the study of extended consumers’ interfaces of retail channels. Mehrabian and Russell’s stimulusorganism-response (S-O-R) paradigm and Sugiyama and Andree’s attention, interest, search, action, and share(AISAS) model were used for this research. Specifically, the present study considered the effect of e-commercewebsite features on consumers’ emotional reactions (pleasure and arousal) and the consequent impact on onlineconsumer behaviors (search, action, and share). Hence, plus the self-reported survey methods, each subject’spsychophysiological indicators (i.e., pleasure and arousal) were measured to obtain more objective and reliabledata and to redeem the results of the self-reported survey. Findings revealed the implications of the e-commercewebsite feature by comprehending the S-O-R paradigm and AISAS model and extending the understanding ofthe role of variables associated with comprehended frameworks based on psychophysiological data.

      • KCI등재

        TCP/IP Hardware Accelerator를 위한 Host Interface의 설계

        정여진,임혜숙,Jung, Yeo-Jin,Lim, Hye-Sook 한국통신학회 2005 韓國通信學會論文誌 Vol.30 No.2B

        빠른 데이터 처리를 위하여 기존에는 소프트웨어방식으로 구현되었던 TCP/IP를 고속의 하드웨어로 구현함에 있어, TCP/IP 하드웨어와 외부 블록간의 통신을 중계하는 블록인 Host Interface를 구현하였다. Host Interface는 TCP/IP 하드웨어와 외부 블록의 중간에 위치하여 외부 블록과의 통신을 위해 AMBA AHB 규약을 따른다. Host Interface는 내부의 Command/Status Register를 통하여 CPU와 TCP/IP 하드웨어 간의 명령, 상태, 헤더 정보 등을 전달하는데 이 때에는 AMBA AHB의 Slave로서 동작한다. Data Flow를 위해서 Host Interface는 AMBA AHB의 Master로서 동작하는데, 데이터 흐름의 방향에 따라 Data flow는 데이터를 수신하는 Receive flow와 데이터를 패킷으로 만들어 보내는 Transmit Flow로 나된다. Rx Flow의 경우, UDP 블록이나 TCP Buffer로부터 받은 데이터를 내부의 작은 RxFIFO를 통해 외부 RxRAM에 써서 CPU가 읽어갈 수 있도록 하고, Tx Flow의 경우에는 외부 TxRAM에서 전송할 데이터를 읽어 와서 TxFIFO를 거쳐 UDP Buffer나 TCP Buffer에 씀으로써 패킷을 만들어 보내도록 한다. 외부 RAM의 액세스에는 Command/Status Register에 위치한 Buffer Descriptor의 정보를 이용하게 된다. Host Interface는 이러한Data Flow의 원활한 흐름을 위해서 여러 세부 기능들을 수행하게 된다. Host Interface의 기능을 검증하기 위하여 여러 testcase들이 수행되었으며, 0.18 마이크론 기술을 사용하여 synthesis한 결과, 내부의 Command/Status Register와 FIFO를 모두 포함하여 약 173K 게이트가 소요됨을 보았다. TCP/IP protocols have been implemented in software program running on CPU in end systems. As the increased demand of fast protocol processing, it is required to implement the protocols in hardware, and Host Interface is responsible for communication between external CPU and the hardware blocks of TCP/IP implementation. The Host Interface follows AMBA AHB specification for the communication with external world. For control flow, the Host Interface behaves as a slave of AMBA AHB. Using internal Command/status Registers, the Host Interface receives commands from CPU and transfers hardware status and header information to CPU. On the other hand, the Host Interface behaves as a master for data flow. Data flow has two directions, Receive Flow and Transmit Flow. In Receive Flow, using internal RxFIFO, the Host Interface reads data from UDP FIFO or TCP buffer and transfers data to external RAM for CPU to read. For Transmit Flow, the Host Interface reads data from external RAM and transfers data to UDP buffer or TCP buffer through internal TxFIFO. TCP/IP hardware blocks generate packets using the data and transmit. Buffer Descriptor is one of the Command/Status Registers, and the information stored in Buffer Descriptor is used for external RAM access. Several testcases are designed to verify TCP/IP functions. The Host Interface is synthesized using the 0.18 micron technology, and it results in 173 K gates including the Command/status Registers and internal FIFOs.

      • KCI등재

        An Analysis on the Preference of Early Childhood Teachers in Horticultural Activities Based on Conjoint Analysis

        정여진,김미진,장택원,윤숙영 인간식물환경학회 2020 인간식물환경학회지 Vol.23 No.5

        Background and objective: This study conducted a conjoint analysis on early childhood teachers to find out their preferences in horticultural activities that are used as a means of education in early childhood education. Methods: For the conjoint analysis, five attributes of horticultural activities were selected. Attribute 1 was method of horticultural activities, divided into two levels: exclusive and integrated horticultural activities. Attribute 2 was object of horticultural activities, divided into three levels: fruit crops, vegetable crops, and floricultural crops. Attribute 3 was activity type, divided into three levels: big and small group, free choice, and outdoor play. Attribute 4 was place for horticultural activities, and divided into two levels: indoors and outdoors. Attribute 5 was time for horticultural activities, divided into two levels: 30 minutes and 30-60 minutes. The orthogonal design was used to extract 20 profiles, after which we conducted a survey on 320 early childhood teachers and analyzed the valid responses from 257 teachers. Results: The preference of early childhood teachers showed highest importance in object (29.1%), followed by activity type (23.2%), activity method (17.4%), time (16.1%), and place (14.2%) (Pearson’s R = .591, p = .008). By level of each attribute, the importance was high in exclusive horticultural activities for activity method, big and small group for activity type, vegetable and floricultural crops for object, indoors for place, and 30 minutes for time. Conclusion: The horticultural program preferred by early childhood teachers is comprised of big and small group activities using vegetable and floricultural crops, carried out indoors for 30 minutes as an exclusive class.

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