This paper presents a set of techniques to automatically find rate optimal or near rate optimal implementations in pipelined processing environments for DSP algorithms that are represented by recursive shift-invariant flow graphs. An instruction sched...
This paper presents a set of techniques to automatically find rate optimal or near rate optimal implementations in pipelined processing environments for DSP algorithms that are represented by recursive shift-invariant flow graphs. An instruction scheduling methodology for a single pipelined processor is presented. In such case, the problem to be addressed is the scheduling of a single instruction stream which controls all of the pipeline stages. The goal of an automatic scheduler in this context is to rearrange the order of instructions such that they are executed with minimum iteration period between successive iteration of defining flow graphs. Since the node execution times in defining flow graphs are deterministic, this research addresses compile time scheduling.