동시 스위칭 환경에서 V\ulcorner/V\ulcorner Pin 수의 최소화를 위한 연구 = A Study of on Minimizing the Number of V\ulcorner/V\ulcorner Pins in Simultaneous Switching Environment

다국어 초록 (Multilingual Abstract)

This paper provides a heuristic analysis technique which determines an optimal number of V\ulcorner/V\ulcorner pads meeting allowable Simultaneous Switching Noise(SN) budget, early in the design phase. Until now, in determining the number of V\ulcorner/V\ulcorner pads, designers had to simulate packaging models case by case in the design phase or roughly allocate the power/ground pins in an inaccurate way according to typical design rules. However, due to the high density and frequency trends of IC technologies, the V\ulcorner/V\ulcorner pads allocation method can affect an adverse effect on IC operations, which requires more accurate and efficient methods be devised. Thus, this paper proposes an analytic V\ulcorner/V\ulcorner pads calculation method that gives a practical help for packaging designs early in the design phase. The proposed method is applied to a design example of a 1/8x208 pin plastic quad flat package (PQFP) and the results are verified through simulation using HSPICE.