Electrodeposition 변수에 따른 Trench Via의 Cu Filling 특성 = Cu Filling Characteristics of Trench Vias with Variations of Electrodeposition Parameters

국문 초록 (Abstract)

칩 스택 패키지의 삼차원 interconnection에 적용을 위해 폭 $75{\sim}10\;{\mu}m$, 길이 3mm의 트랜치 비아에 대해 전기도금전류밀도 및 전류모드에 따른 Cu filling 특성을 분석하였다. 직류모드로 $1.25mA/cm^{2}$에서 Cu filling한 경우, 트랜치 비아의 폭이 $75{\sim}35{\mu}m$ 범위에서는 95% 이상의 높은 Cu filling ratio를 나타내었다. 직류 전류밀도 $2.5mA/cm^{2}$에서 Cu filling한 경우에는 $1.25mA/cm^{2}$ 조건에 비해 열등한 Cu filling ratio를 나타내었으며, 직류모드에 비해 펄스모드가 우수한 Cu filling 특성을 나타내었다.

다국어 초록 (Multilingual Abstract)

For chip-stack package applications, Cu filling characteristics into trench vias of $75{\sim}10\;{\mu}m$ width and 3 mm length were investigated with variations of electroplating current density and current mode. At $1.25mA/cm^{2}$ of DC mode, Cu filling ratio higher than 95% was obtained for trench vias of $75{\sim}35{\mu}m$ width. When electroplated at DC $2.5mA/cm^{2}$, Cu filling ratios became inferior to those processed at DC $1.25mA/cm^{2}$. Pulse current mode exhibited Cu filling characteristics superior to DC current mode.

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