Research on Ultra Low-Voltage 0.4-V Delta-Sigma Modulators

다국어 초록 (Multilingual Abstract)

This dissertation presents delta-sigma modulators that operates at extremely low supply voltage of 0.4 V without using a clock boosting technique. A mixed differential difference amplifier (DDA) integrator and a hybrid switching integrator are proposed. To maintain the advantages of a discrete-time integrator in oversampled data converters, the mixed DDA integrator is developed that removes the input sampling switch in a switched-capacitor integrator. Conventionally, many low-voltage delta-sigma modulators have used high-voltage generating circuits to boost the clock voltage levels. The mixed DDA integrator with both a switched-resistor and a switched-capacitor technique is developed to implement a discrete-time integrator without clock boosted switches. The proposed mixed DDA integrator is demonstrated by a third-order delta-sigma modulator with a feedforward topology. The fabricated modulator shows a 68-dB signal-to-noise-plus-distortion ratio (SNDR) for 20-kHz signal bandwidth with an oversampling ratio of 80. The chip consumes 140 μWof power at a true 0.4-V power supply, which is the lowest voltage without a clock boosting technique among the state-of-the-art modulators in this signal band.
The proposed hybrid switching integrator consists of both switched-resistor and switched-capacitor operations and significantly reduces distortion at a low supply voltage. Variation in the turn-on resistance, which is the main source of distortion, is avoided by placing the switches at the virtual ground node of the amplifier. The proposed low-voltage design scheme can replace commonly-used clock boosting techniques, which rely on internal high-voltage generation circuits. A fabricated modulator achieves a 76.1-dB SNDR and an 82-dB dynamic range (DR) at a 20-kHz bandwidth. The measured total power consumption is 63 μW from a 0.4-V supply voltage. The measured results show robust SNDR performance, even at ±10% supply voltage variations. The measured results also show stable performance over a wide temperature range.

목차 (Table of Contents)

• Table of Contents 4
• List of Figures 6
• List of Tables 9
• Abstract 10
• I Introduction 12
• 1.1 Motivation 12
• 1.2 Organization 15
• II Design Consideration for Low-Voltage Low-Power Delta-Sigma Modulators 17
• 2.1 Basic of Delta-Sigma Modulators 17
• 2.2 Challenges at Low Supply Voltage 20
• 2.3 Clock Boosting and Bootstrapped Switch 23
• 2.4 Low-Power Architecture 25
• 2.5 Continuous-Time Delta-Sigma Modulators 29
• III A 0.4-V Delta-Sigma Modulator Using a Mixed DDA Integrator 30
• 3.1 Proposed Mixed DDA Integrator 30
• 3.2 Circuit Implementation 37
• 3.2.1 Behavioral Simulation 37
• 3.2.2 Operational Transconductance Amplifier 38
• 3.2.3 Designed Modulator 42
• 3.3 Measurement Results 44
• 3.4 Summary 49
• IV A 0.4-V Delta-Sigma Modulator Using a Hybrid Switching Integrator 52
• 4.1 Mixed DDA Integrator 52
• 4.2 Proposed Hybrid Switching Integrator 54
• 4.2.1 Proposed Circuit 54
• 4.2.2 Clock Jitter Comparison 57
• 4.3 Circuit Implementation 60
• 4.4 Measurement Results 66
• 4.5 Summary 69
• V Conclusion 75