반도체 웨이퍼의 폴리싱 가공이 개별 칩들의 기계적 손상에 미치는 영향 = Effect of Polishing Process of a Semiconductor Wafer on the Fracture Mechanics of Diced Chips

다국어 초록 (Multilingual Abstract)

This article shows how the adoption of polishing as the back-lapping process of semiconductor wafers influences the flexural fracture strength of their individually diced chips. According to the experimental results of this study, a polishing powder with a particle size of approximately 1 um in diameter can meaningfully reduce the fracture strength of chips with a thickness of 50 um. Particularly, when the diced chips have polishing-induced defects formed along a (110)-dicing plane, they reveal the lowest fracture strength. An in-situ examination details how polishing causes sharp notches on the back surface of the chips which provide preferential sites for chip cracking during a flexural test.