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이 학술지의 논문 검색
1A.1 Storage Assignment During High-Level Synthesis for Configurable Achitectures
Gong, W.; Wang, G.; Kastner, R. ICCAD PUBLICATIONS 2005 p.3-6
1A.2 Performance-Driven Read-After-Write Dependencies Softening in High-Level Synthesis
Sautua, R. R.; Molina, M. C.; Mendias, J. M.; Hermida, R. ICCAD PUBLICATIONS 2005 p.7-12
Flores, P. F.; Monteiro, J. C.; Costa, E. C. ICCAD PUBLICATIONS 2005 p.13-18
1B.1 FPGA Device and Architecture Evaluation Considering Process Variations
Wong, H. Y. P.; Cheng, L.; Lin, Y.; He, L. ICCAD PUBLICATIONS 2005 p.19-24
Ran, Y.; Sadowska, M. M. ICCAD PUBLICATIONS 2005 p.25-32
1B.3 SPIDER: Simultaneous Post-Layout IR-Drop and Metal Density Enhancement with Redundant Fill
Leung, K. S. ICCAD PUBLICATIONS 2005 p.33-40
1C.1 Computational Geometry Based Placement Migration
Luo, T.; Ren, H.; Alpert, C. J.; Pan, D. Z. ICCAD PUBLICATIONS 2005 p.41-47
1C.2 An Efficient and Effective Detailed Placement Algorithm
Pan, M.; Viswanathan, N.; Chu, C. ICCAD PUBLICATIONS 2005 p.48-55
1C.3 Post-Placement Rewiring and Rebuffering by Exhaustive Search for Functional Symmetries
Chang, K.; Markov, I. L.; Bertacco, V. ICCAD PUBLICATIONS 2005 p.56-63
1C.4 Wirelength Optimization by Optimal Block Orientation
Hao, X.; Brewer, F. ICCAD PUBLICATIONS 2005 p.64-72