<P>A switched substrate-shield inductor (SSI) topology in bulk CMOS is proposed which minimizes parasitic capacitance and substrate losses, while tuned magnetically induced currents facilitate inductor tunability. The high frequency behavior of ...
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https://www.riss.kr/link?id=A107511392
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2017
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SCI,SCIE,SCOPUS
학술저널
2964-2976(13쪽)
0
상세조회0
다운로드다국어 초록 (Multilingual Abstract)
<P>A switched substrate-shield inductor (SSI) topology in bulk CMOS is proposed which minimizes parasitic capacitance and substrate losses, while tuned magnetically induced currents facilitate inductor tunability. The high frequency behavior of ...
<P>A switched substrate-shield inductor (SSI) topology in bulk CMOS is proposed which minimizes parasitic capacitance and substrate losses, while tuned magnetically induced currents facilitate inductor tunability. The high frequency behavior of the induced current is analyzed, resulting in intuitive insights and design guidelines for a high-performance SSI. An SSI prototype in 65-nm bulk CMOS achieves 34% inductance tunability with a quality factor of >10.3. A voltage-controlled oscillator (VCO) using SSI achieves 40.3% tuning range, from 21 to 31.6 GHz, and a phase noise of -119.1 ± 3.7 dBc/Hz at 10-MHz offset frequencies. The VCO core consumes 4.3 ± 0.2 mW from a 1-V supply.</P>
Theory for Pseudo-Butterworth Filter Response and Its Application to Bandwidth Tuning