1 M. Herlihy, "Transactional memory: architectural support for lock-free data structures" 289-300, 1993
2 S. Ghemawat, "TCMalloc: thread-caching Malloc"
3 N. Diegues, "Self-tuning intel transactional synchronization extensions" 209-219, 2014
4 C. C. Minh, "STAMP: Stanford transactional applications for multi-processing" 35-46, 2008
5 H. Yun, "PALLOC: DRAM bank-aware memory allocator for performance isolation on multicore platforms" 155-166, 2014
6 L. Dalessandro, "NOrec: streamlining STM by abolishing ownership records" 67-78, 2010
7 J. Vermorel, "Multi-armed bandit algorithms and empirical evaluation" 437-448, 2005
8 L. Dalessandro, "Hybrid norec: a case study in the effectiveness of best effort hardware transactional memory" 39 (39): 39-52, 2011
9 L. C. Baird, "Gradient descent for general reinforcement learning" 11 : 968-974, 1999
10 R. N. Zare, "Angular Momentum: Understanding Spatial Aspects in Chemistry and Physics" Wiley 2011
1 M. Herlihy, "Transactional memory: architectural support for lock-free data structures" 289-300, 1993
2 S. Ghemawat, "TCMalloc: thread-caching Malloc"
3 N. Diegues, "Self-tuning intel transactional synchronization extensions" 209-219, 2014
4 C. C. Minh, "STAMP: Stanford transactional applications for multi-processing" 35-46, 2008
5 H. Yun, "PALLOC: DRAM bank-aware memory allocator for performance isolation on multicore platforms" 155-166, 2014
6 L. Dalessandro, "NOrec: streamlining STM by abolishing ownership records" 67-78, 2010
7 J. Vermorel, "Multi-armed bandit algorithms and empirical evaluation" 437-448, 2005
8 L. Dalessandro, "Hybrid norec: a case study in the effectiveness of best effort hardware transactional memory" 39 (39): 39-52, 2011
9 L. C. Baird, "Gradient descent for general reinforcement learning" 11 : 968-974, 1999
10 R. N. Zare, "Angular Momentum: Understanding Spatial Aspects in Chemistry and Physics" Wiley 2011
11 V. Pankratius, "A study of transactional memory vs. locks in practice" 43-52, 2011