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      반도체 회로에서의 내방사선 설계 방법 연구 동향 = Recent Trends in Radiation-Hardened Circuit Design

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      https://www.riss.kr/link?id=A108284902

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      다국어 초록 (Multilingual Abstract)

      To secure reliability of circuits from radiation-induced degradation or malfunction such as Single-Event Effects (SEE) and Total Ionizing Dose (TID) has become more and more important. In this paper, several recent solutions are reviewed among various techniques for mitigating radiation effects. Main contents include 1) the SEE mitigation utilizing the properties of the inverse mode, 2) the SEE-mitigation circuit based on Electrostatic Discharge (ESD) protection circuit, 3) the Radiation-Hardened-By-Design (RHBD) Flip-Flops (FFs) to prevent SEE, 4) the Analog Single-Event Transients (ASET) detection in a DC-DC converter, and 5) P-edge NMOS for TID mitigation. Operation principles of each techniques are explained and discussed in terms of improvements in radiation hardening.
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      To secure reliability of circuits from radiation-induced degradation or malfunction such as Single-Event Effects (SEE) and Total Ionizing Dose (TID) has become more and more important. In this paper, several recent solutions are reviewed among various...

      To secure reliability of circuits from radiation-induced degradation or malfunction such as Single-Event Effects (SEE) and Total Ionizing Dose (TID) has become more and more important. In this paper, several recent solutions are reviewed among various techniques for mitigating radiation effects. Main contents include 1) the SEE mitigation utilizing the properties of the inverse mode, 2) the SEE-mitigation circuit based on Electrostatic Discharge (ESD) protection circuit, 3) the Radiation-Hardened-By-Design (RHBD) Flip-Flops (FFs) to prevent SEE, 4) the Analog Single-Event Transients (ASET) detection in a DC-DC converter, and 5) P-edge NMOS for TID mitigation. Operation principles of each techniques are explained and discussed in terms of improvements in radiation hardening.

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      참고문헌 (Reference) 논문관계도

      1 P. K. C. Mishu, "Voltage-Controlled Oscillator Utilizing Inverse-Mode SiGe-HBT Biasing Circuit for the Mitigation of Single-Event Effects" 69 (69): 1242-1248, 2022

      2 A. Y. Borisov, "The Electrical Bias Influence on the Total Ionizing Dose Degradation of the MOST Parameters" 1-4, 2021

      3 R. Naseer, "The DF-dice storage element for immunity to soft errors" 1 : 303-306, 2005

      4 F. M. Sajjade, "Single Event Transient(SET)Mitigation Circuits With Immune Leaf Nodes" 21 (21): 70-78, 1846

      5 N. Liu, "Single Event Effects Radiation Hardened by Design for DC-DC Converter Based on Automatic Detection and Dynamic Compensation" 426-430, 2022

      6 G. Yan, "Simulation of Total Ionizing Dose (TID) Effects Mitigation Technique for 22 nm Fully-Depleted Silicon-on-Insulator (FDSOI) Transistor" 8 : 154898-154905, 2020

      7 Z. E. Fleetwood, "SiGe HBT Profiles With Enhanced Inverse-Mode Operation and Their Impact on Single-Event Transients" 65 (65): 399-406, 2018

      8 C. Peng, "Radiation Hardening by the Modification of Shallow Trench Isolation Process in Partially Depleted SOI MOSFETs" 65 (65): 877-883, 2018

      9 X. Xie, "P-Edge NMOSFET for Improving TID Tolerance" 19 (19): 242-244, 2019

      10 H. H. Shaker, "New Proposed Methodology for Radiation Hardening By Design of MOS Circuits" 1-4, 2020

      1 P. K. C. Mishu, "Voltage-Controlled Oscillator Utilizing Inverse-Mode SiGe-HBT Biasing Circuit for the Mitigation of Single-Event Effects" 69 (69): 1242-1248, 2022

      2 A. Y. Borisov, "The Electrical Bias Influence on the Total Ionizing Dose Degradation of the MOST Parameters" 1-4, 2021

      3 R. Naseer, "The DF-dice storage element for immunity to soft errors" 1 : 303-306, 2005

      4 F. M. Sajjade, "Single Event Transient(SET)Mitigation Circuits With Immune Leaf Nodes" 21 (21): 70-78, 1846

      5 N. Liu, "Single Event Effects Radiation Hardened by Design for DC-DC Converter Based on Automatic Detection and Dynamic Compensation" 426-430, 2022

      6 G. Yan, "Simulation of Total Ionizing Dose (TID) Effects Mitigation Technique for 22 nm Fully-Depleted Silicon-on-Insulator (FDSOI) Transistor" 8 : 154898-154905, 2020

      7 Z. E. Fleetwood, "SiGe HBT Profiles With Enhanced Inverse-Mode Operation and Their Impact on Single-Event Transients" 65 (65): 399-406, 2018

      8 C. Peng, "Radiation Hardening by the Modification of Shallow Trench Isolation Process in Partially Depleted SOI MOSFETs" 65 (65): 877-883, 2018

      9 X. Xie, "P-Edge NMOSFET for Improving TID Tolerance" 19 (19): 242-244, 2019

      10 H. H. Shaker, "New Proposed Methodology for Radiation Hardening By Design of MOS Circuits" 1-4, 2020

      11 Q. Zhen, "Impact of TID on Within-Wafer Variability of Radiation- Hardened SOI Wafers" 8 (8): 1423-1429, 2021

      12 T. Li, "Forward body bias for characterizing TID effect in CMOS integrated circuits" 1-5, 2017

      13 T. Lin, "Experimental investigation into radiation-hardening-bydesign (RHBD) flip-flop designs in a 65nm CMOS process" 966-969, 2016

      14 A. Feeley, "Effect of Frequency on Total Ionizing Dose Response of Ring Oscillator Circuits at the 7-nm Bulk FinFET Node" 69 (69): 327-332, 2022

      15 P. Mongkolkachit, "Design technique for mitigation of alpha-particleinduced single-event transients in combinational logic" 3 (3): 89-92, 2003

      16 M. Lee, "Design for High Reliability of CMOS IC With Tolerance on Total Ionizing Dose Effect" 20 (20): 459-467, 2020

      17 M. Cho, "Best Practices for Using Electrostatic Discharge Protection Techniques for Single-Event Transient Mitigation" 66 (66): 240-247, 2019

      18 P. E. Dodd, "Basic mechanisms and modeling of single-event upset in digital microelectronics" 50 (50): 583-602, 2003

      19 J. E. Knudsen, "An Area and Power Efficient Radiation Hardened by Design Flip-Flop" 53 (53): 3392-3399, 2006

      20 J. Chen, "ASET and TID Characterization of a Radiation Hardened Bandgap Voltage Reference in a 28-nm Bulk CMOS Technology" 69 (69): 1141-1147, 2022

      21 M. Baghbanmanesh, "A 10-Bit Radiation-Hardened by Design (RHBD) SAR ADC for Space Applications" 53-56, 2017

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