TDC 시간 측정을 위한 고정밀 Ring Oscillator FPGA 설계 = Design of High-Precision Ring Oscillator FPGA for TDC Time Measurement

다국어 초록 (Multilingual Abstract)

To develop nuclear measurement system with characteristics including both re-configuration and multi-functions, we proposed a field programmable gate array (FPGA) technique to implement TDC which is more suitable for high energy physics system. In TDC scheme, the timing resolution is more important than the count rates of channel. In order to manage pico-second resolution TDC, we used the delay components of FPGA, utilized the place and route (P&R) delay difference, and then got two ring oscillators. By setting P&R area constraints, we generated two precise ring oscillators with slightly different frequencies. Finally, we evaluated that the period difference of these two ring oscillators was about 60 pico-seconds, timing resolution of TDC.

목차 (Table of Contents)

• Abstract
• Ⅰ. 서론
• Ⅱ. 본론
• Ⅲ. 구현
• Ⅳ. 결론 및 향후 연구 방향
• 참고문헌