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    Analysis of Reliability Issues and Lifetime Estimation in NAND Flash Memory = 낸드 플래시 메모리에서의 신뢰성 분석 및 새로운 수명 평가 방법 연구

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    ABSTRACT

    Analysis of Reliability Issues and Lifetime Estimation in NAND Flash Memory

    Kyunghwan Lee
    School of Electrical Engineering and Computer Science
    College of Engineering
    Seoul National University

    As NAND flash memory continues to be aggressively scaled down, it becomes more susceptible to reliability problems. As a result, the lifetime estimation of the device is now serious topic for mass production. However, the apparent activation energy (Eaa) in the conventional temperature-accelerated lifetime test method of NAND flash memory does not follow the Arrhenius model, since various failure mechanisms occur concurrently. Therefore, this conventional Arrhenius model has a huge error in the lifetime prediction. Generally well-known dominant failure mechanisms in NAND flash memory are detrapping, interface trap (Nit) recovery, and trap-assisted tunneling (TAT).
    In this thesis, we propose an advanced charge loss model and completely separate three dominant failure mechanisms in terms of the time-constant (τ) and the final ΔVth in various generations (A, B, C) of NAND flash test element group (TEG) cells and sub 20-nm multi-level cell (MLC) NAND flash memory main-chip. As a result, it is observed that each τ of the mechanisms follows the Arrhenius law well, which means that each has its own activation energy (Ea). In addition, we deeply investigate the retention characteristics of the dominant mechanisms in various conditions, such as the number of P/E cycling times, probability level of the Vth cumulative distribution, and states in sub 20-nm MLC NAND flash memory. We also extracte the contribution rate (CR) of each failure mechanisms at criterion of |ΔVth_Total| according to baking temperature. The results give the physical reason for abnormal retention behaviors such as Eaa roll-off at the PV3 and negative Eaa at the ERS. P/E cycling stress generates traps in the tunnel oxide layer. We extract the trap profile in the tunnel oxide in space and energy distributions using 3D TCAD simulation.
    For the first time, we reveal the origin of abnormal Eaa characteristics and derive a mathematical formula for Eaa as a function of each Ea(mechanism) in NAND flash memory. We propose two different accurate lifetime estimation models for sub 20-nm NAND flash memory. The first model is the Eaa integration method. Using the analytically modeled Eaa equation, the lifetime of NAND flash memory is accurately predicted. The second model is the advanced extrapolation method using the trends of extracted parameters. Using the proposed model, accurate lifetime is estimated in all states (PV3, PV2, PV1, and ERS). Since the proposed model takes into account the retention characteristics for various mechanisms, this model provides much accurate prediction on the lifetime of NAND flash memory. Also, the lifetime estimation for the next generation of NAND flash memory is analyzed using 3D TCAD simulation. As a result, the lifetime for the next generation is expected to decrease as much as 66 % of the lifetime for the current generation.














    Keywords: MLC NAND flash memory, failure mechanisms, Arrhenius model, activation energy (Ea), P/E cycling stress, lifetime estimation

    Student Number: 2011-20892
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    ABSTRACT Analysis of Reliability Issues and Lifetime Estimation in NAND Flash Memory Kyunghwan Lee School of Electrical Engineering and Computer Science College of Engineering Seoul National University As NAND flash memory continues to be aggressi...

    ABSTRACT

    Analysis of Reliability Issues and Lifetime Estimation in NAND Flash Memory

    Kyunghwan Lee
    School of Electrical Engineering and Computer Science
    College of Engineering
    Seoul National University

    As NAND flash memory continues to be aggressively scaled down, it becomes more susceptible to reliability problems. As a result, the lifetime estimation of the device is now serious topic for mass production. However, the apparent activation energy (Eaa) in the conventional temperature-accelerated lifetime test method of NAND flash memory does not follow the Arrhenius model, since various failure mechanisms occur concurrently. Therefore, this conventional Arrhenius model has a huge error in the lifetime prediction. Generally well-known dominant failure mechanisms in NAND flash memory are detrapping, interface trap (Nit) recovery, and trap-assisted tunneling (TAT).
    In this thesis, we propose an advanced charge loss model and completely separate three dominant failure mechanisms in terms of the time-constant (τ) and the final ΔVth in various generations (A, B, C) of NAND flash test element group (TEG) cells and sub 20-nm multi-level cell (MLC) NAND flash memory main-chip. As a result, it is observed that each τ of the mechanisms follows the Arrhenius law well, which means that each has its own activation energy (Ea). In addition, we deeply investigate the retention characteristics of the dominant mechanisms in various conditions, such as the number of P/E cycling times, probability level of the Vth cumulative distribution, and states in sub 20-nm MLC NAND flash memory. We also extracte the contribution rate (CR) of each failure mechanisms at criterion of |ΔVth_Total| according to baking temperature. The results give the physical reason for abnormal retention behaviors such as Eaa roll-off at the PV3 and negative Eaa at the ERS. P/E cycling stress generates traps in the tunnel oxide layer. We extract the trap profile in the tunnel oxide in space and energy distributions using 3D TCAD simulation.
    For the first time, we reveal the origin of abnormal Eaa characteristics and derive a mathematical formula for Eaa as a function of each Ea(mechanism) in NAND flash memory. We propose two different accurate lifetime estimation models for sub 20-nm NAND flash memory. The first model is the Eaa integration method. Using the analytically modeled Eaa equation, the lifetime of NAND flash memory is accurately predicted. The second model is the advanced extrapolation method using the trends of extracted parameters. Using the proposed model, accurate lifetime is estimated in all states (PV3, PV2, PV1, and ERS). Since the proposed model takes into account the retention characteristics for various mechanisms, this model provides much accurate prediction on the lifetime of NAND flash memory. Also, the lifetime estimation for the next generation of NAND flash memory is analyzed using 3D TCAD simulation. As a result, the lifetime for the next generation is expected to decrease as much as 66 % of the lifetime for the current generation.














    Keywords: MLC NAND flash memory, failure mechanisms, Arrhenius model, activation energy (Ea), P/E cycling stress, lifetime estimation

    Student Number: 2011-20892

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    목차 (Table of Contents)

    • Chapter 1 Introduction 1
    • 1.1. Reliability Issues in NAND Flash Mempry 1
    • 1.2. Review of Failure Mechanisms in NAND Flash Memory 6
    • 1.2.1 Detrapping Mechanism 7
    • 1.2.2 Trap-assisted tunneling Mechanism 9
    • Chapter 1 Introduction 1
    • 1.1. Reliability Issues in NAND Flash Mempry 1
    • 1.2. Review of Failure Mechanisms in NAND Flash Memory 6
    • 1.2.1 Detrapping Mechanism 7
    • 1.2.2 Trap-assisted tunneling Mechanism 9
    • 1.2.3 Detrapping Mechanism vs. TAT Mechanism 13
    • 1.2.4 Interface trap (Nit) recovery Mechanism 15
    • 1.3. Motivation and Thesis Organization 21
    • Chapter 2 Introduction of Conventional Lifetime Estimation Model and Proposed Charge Loss Model 23
    • 2.1. Introduction 23
    • 2.2. Conventional Lifetime Estimation Methods 25
    • 2.2.1 Arrhenius Model (1/T Model) 25
    • 2.2.2 T Model 29
    • 2.3. Proposed Charge Loss Model 32
    • 2.3.1 Weibull Distribution (Stretched Exponential) Model 32
    • 2.3.2 Physical Background of New Model 36
    • 2.4. Summary 40
    • Chapter 3 Activation Energies (Ea) of Failure Mechanisms in Advanced NAND Flash Cells for Different Generations and P/E Cycling 41
    • 3.1. Introduction 41
    • 3.2. Procedure of Activation Energies (Ea) Extraction 43
    • 3.3. Analysis of Failure Mechanisms 53
    • 3.3.1 Detrapping Mechanism 54
    • 3.3.2 TAT Mechanism (Generation dependence) 55
    • 3.3.3 TAT Mechanism (P/E cycling dependence) 58
    • 3.4. Summary 59
    • Chapter 4 Mechanism Separation and Analysis of Retention Characteristics in Sub 20-nm NAND Flash Memory Main-Chip 60
    • 4.1. Introduction 60
    • 4.2. Observation of Abnormal Retention Characteristics in Sub 20nm NAND Flash Memory Main-Chip 62
    • 4.3. Parameter Extraction in NAND Main-Chip 65
    • 4.3.1 Parameter Extraction in the PV3 state 65
    • A. TAT related Parameter Extraction 66
    • B. Additional Limiting Condition (PV3 state) 70
    • C. Set-up for Parameters Extraction 73
    • 4.3.2 Parameter Extraction in the Other states 75
    • 4.4. Analysis on Retention Characteristics 79
    • 4.4.1 P/E cycling times and State Dependence 79
    • A. Analysis of Retention Characteristics for the PV3 state 81
    • B. Analysis of Retention Characteristics for the ERS state 83
    • C. TAT mechanism vs. Detrapping mechanism 88
    • 4.4.2 Probability Level Dependence 98
    • 4.4.3 Analysis of Detrapping Mechanism using 3D TCAD simulation 103
    • 4.5. Summary 109
    • Chapter 5 Analytical Model for Apparent Activation Energy (Eaa) and Proposed Lifetime Estimation Method 110
    • 5.1. Introduction 110
    • 5.2. Modeling for Apparent Activation Energy (Eaa) 112
    • 5.3. Proposed Lifetime Estimation Method 123
    • 5.3.1 Eaa Integration Method 123
    • 5.3.2 Advanced Extrapolation Method 125
    • 5.4. Lifetime Estimation for the Next Generation 131
    • 5.4.1 Detrapping Parameter Extraction 133
    • 5.4.2 Nit recovery Parameter Extraction 137
    • 5.4.3 TAT Parameter Extraction 141
    • 5.4.4 Lifetime Estimation Results according to the Generations 147
    • 5.5. Summary 149
    • Conclusions 150
    • Bibliography 152
    • Abstract in Korean 164
    • List of Publications 166
    • Conferences 168
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