1 "Synthesis of pipelined data paths" 36-40, jan.1992.
2 "Scheduling for functional Pipelining and Loop Winding Proc. of the 28th Design Automation Conference" 764-769, 1991.
3 "Scheduling and Hardware Sharing in Pipelined Data Path" 24-27, 1989.
4 "Optimum and Heuristic Data Path Scheduling under Resource Constraints" pp.65-701990.07
5 "Improving the computational performance of ILP-based problems" 593-596, 1998.
6 "HIGH- LEVEL SYNTHESIS Introduction to Chip and Syatem Design" Kluwer Academic Publishers 213-258, 1992.
7 "Force-directed scheduling for behavioral synthesis of ASIC's" 8 : 661-679, 1989.03
8 "Efficiency Improvements for Force- Directed Scheduling Proc. of Int. Conf. Computer- Aided Design" Aarts E.H.L. 286-291, 1992.
9 "Concept & Applications in High Level Synthesis Proc. of the 39th Design Automation Conference"
10 "An effective methodology for functional pipelining" 230-233, 1992.
1 "Synthesis of pipelined data paths" 36-40, jan.1992.
2 "Scheduling for functional Pipelining and Loop Winding Proc. of the 28th Design Automation Conference" 764-769, 1991.
3 "Scheduling and Hardware Sharing in Pipelined Data Path" 24-27, 1989.
4 "Optimum and Heuristic Data Path Scheduling under Resource Constraints" pp.65-701990.07
5 "Improving the computational performance of ILP-based problems" 593-596, 1998.
6 "HIGH- LEVEL SYNTHESIS Introduction to Chip and Syatem Design" Kluwer Academic Publishers 213-258, 1992.
7 "Force-directed scheduling for behavioral synthesis of ASIC's" 8 : 661-679, 1989.03
8 "Efficiency Improvements for Force- Directed Scheduling Proc. of Int. Conf. Computer- Aided Design" Aarts E.H.L. 286-291, 1992.
9 "Concept & Applications in High Level Synthesis Proc. of the 39th Design Automation Conference"
10 "An effective methodology for functional pipelining" 230-233, 1992.
11 "A software package for synthesis of pipelines from behavioral specification IEEE Trans. on Computer-Aided Design" 7 : 356-370,
12 "A scheduler for pipeline synthesis IEEE Trans. on CAD/ICAS" 12 : 1279-1286,