1 KESHAB K. PARHI, "VLSI Digital Signal Processing" JOHN WILEY & SONS,INC 1999
2 Y.C. Kim, "VHDL for digital design" Hg Science Publisher 2001
3 D.H. Youn, "Modrn CRYTOGRAPHY" 2004
4 최현식, "MRAS 기법을 이용한 권선형 유도전동기의 속도센서리스 벡터제어" 대한전자공학회 42 (42): 29-34, 2005
5 Martin P.J., "Information systems security" Van Nostrand Reinhold 1993
6 H.R.Yoo, "Hardware Design and Implementation for SEED Cipher Processor of Dynamic Scheduling Architecture" 2003
7 C.E.Shanon, "Communication Theory of Secrecy System" 30 : 50-64, 1951
8 National Security Research Institute, "ARIA Algorithm Specification"
9 김기쁨, "4가지 운영모드와 128/256-비트 키 길이를 지원하는 ARIA-AES 통합 암호 프로세서" 한국정보통신학회 21 (21): 795-803, 2017
10 Telecommunication Technology Associate, "128-bits Block Encryption Algorithm (SEED)"
1 KESHAB K. PARHI, "VLSI Digital Signal Processing" JOHN WILEY & SONS,INC 1999
2 Y.C. Kim, "VHDL for digital design" Hg Science Publisher 2001
3 D.H. Youn, "Modrn CRYTOGRAPHY" 2004
4 최현식, "MRAS 기법을 이용한 권선형 유도전동기의 속도센서리스 벡터제어" 대한전자공학회 42 (42): 29-34, 2005
5 Martin P.J., "Information systems security" Van Nostrand Reinhold 1993
6 H.R.Yoo, "Hardware Design and Implementation for SEED Cipher Processor of Dynamic Scheduling Architecture" 2003
7 C.E.Shanon, "Communication Theory of Secrecy System" 30 : 50-64, 1951
8 National Security Research Institute, "ARIA Algorithm Specification"
9 김기쁨, "4가지 운영모드와 128/256-비트 키 길이를 지원하는 ARIA-AES 통합 암호 프로세서" 한국정보통신학회 21 (21): 795-803, 2017
10 Telecommunication Technology Associate, "128-bits Block Encryption Algorithm (SEED)"