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A 0.18µm CMOS 12Gb/s 10-PAM Serial Link Transmitter

한글로보기

https://www.riss.kr/link?id=A107753379

저자

SONG, Bongsub ; KIM, Kwangsoo ; BURM, Jinwook
발행기관
The Institute of Electronics, Information and Communication Engineers
학술지명
IEICE transactions on electronics
권호사항

Vol.94e.c No.11 [2011]
발행연도
2011
작성언어
-
주제어

pulse amplitude modulation (PAM) ; CMOS ; transmitters ; high-speed integrated circuits
등재정보
SCOPUS,SCIE
자료형태
학술저널
수록면

1787-1793(7쪽)
제공처
ScienceON

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다국어 초록 (Multilingual Abstract)

A 12Gb/s 10-level pulse amplitude modulation (PAM) serial-link transmitter was implemented using a 0.18µm CMOS process. The proposed 10-PAM transmitter achieves a channel efficiency of 4bit/symbol by dual-mode amplitude modulations using 10 differential-mode levels and 3 common-mode levels. The measured maximum data-rate was 12Gb/s over 0.7-m cable and 2-cm printed circuit board (PCB) traces. The entire transmitter consumes 432mW such that the figure of merit of the transmitter is 36pJ/bit. The present work demonstrates the greater channel efficiency of 4bit/symbol than the currently reported multi-level PAM transmitters.

번역하기

A 12Gb/s 10-level pulse amplitude modulation (PAM) serial-link transmitter was implemented using a 0.18µm CMOS process. The proposed 10-PAM transmitter achieves a channel efficiency of 4bit/symbol by dual-mode amplitude modulations usin...

A 12Gb/s 10-level pulse amplitude modulation (PAM) serial-link transmitter was implemented using a 0.18µm CMOS process. The proposed 10-PAM transmitter achieves a channel efficiency of 4bit/symbol by dual-mode amplitude modulations using 10 differential-mode levels and 3 common-mode levels. The measured maximum data-rate was 12Gb/s over 0.7-m cable and 2-cm printed circuit board (PCB) traces. The entire transmitter consumes 432mW such that the figure of merit of the transmitter is 36pJ/bit. The present work demonstrates the greater channel efficiency of 4bit/symbol than the currently reported multi-level PAM transmitters.