다치논리에 기초한 임베디드시스템구성에 관한 연구 = A Study on Constructing thr Embedded Systems based on Multiple-Valued Logic

다국어 초록 (Multilingual Abstract)

This paper presents three novel cache models using Multiple-valued Logic(MVL) paradigm to educe the cache data storage area and cache energy consumption for embedded systems.
Multiple-valued logic caches have significant potential for compact and power-efficient cache array esign.
The cache models differ from each other depending on whether they store tag and data in binary, radix-r or mix or both.
Our analytical study of cache silicon area shows that an embedded System-on-a-Chip(SoC)equipped with multiple-valued logic cache model can reduce the cache data storage area up to 6% egardless of cache parameters.
Also, our experiments on several embedded benchmarks demonstrate that dynamic cache energy consumption can be reduced up to 62% in a multiple-valued logic instruction cache in an mbedded SoC.