<P> A dual-capture wide dynamic range CMOS image sensor using an in-pixel floating-diffusion (FD) storage capacitor is proposed. The proposed structure uses the FD as a storage capacitor. The potential of the FD node is read out using a floating...
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https://www.riss.kr/link?id=A107723858
2008
-
SCOPUS,SCIE
학술저널
2590-2594(5쪽)
0
상세조회0
다운로드다국어 초록 (Multilingual Abstract)
<P> A dual-capture wide dynamic range CMOS image sensor using an in-pixel floating-diffusion (FD) storage capacitor is proposed. The proposed structure uses the FD as a storage capacitor. The potential of the FD node is read out using a floating...
<P> A dual-capture wide dynamic range CMOS image sensor using an in-pixel floating-diffusion (FD) storage capacitor is proposed. The proposed structure uses the FD as a storage capacitor. The potential of the FD node is read out using a floating-gate capacitor without a contact metallization of the FD node to reduce the leakage. The proposed sensor was fabricated using a 0.35-<TEX Notation='TeX'><TEX>$\mu\hbox{m}$</TEX></TEX> CMOS process. The chip includes 320 <TEX Notation='TeX'><TEX>$\times$</TEX></TEX> 240 pixels whose pitch is 5.6 <TEX Notation='TeX'><TEX>$\mu\hbox{m}$</TEX></TEX> and whose fill factor is 36%. The measurement results show 100-dB dynamic range, and the leakage at the non-metalized FD is reduced to about one-third of that of the conventional FD with the contact metallization. </P>