1 J. F. Buckwalter, "Analysis and equalization of datad ependent jitter" 41 (41): 607-620, 2006
2 Tetsuya Iizuka, "A true 4-cycle lock reference-less all-digital burst-mode CDR utilizing coarse-fine phase generator with embedded TDC" 2013
3 G. Balamurugan, "A scalable 5-15Gbps, 14-75mW lowpower I/O transceiver in 65nm CMOS" 43 (43): 1010-1019, 2008
4 H. Jeon, "A clock embedded differential signaling (CEDSTM) for the next generation TFT-LCD applications" 975-978, 2009
5 K. -L. J. Wong, "A 27-mW 3. 6-Gb/s I/O transceiver" 39 (39): 602-612, 2004
1 J. F. Buckwalter, "Analysis and equalization of datad ependent jitter" 41 (41): 607-620, 2006
2 Tetsuya Iizuka, "A true 4-cycle lock reference-less all-digital burst-mode CDR utilizing coarse-fine phase generator with embedded TDC" 2013
3 G. Balamurugan, "A scalable 5-15Gbps, 14-75mW lowpower I/O transceiver in 65nm CMOS" 43 (43): 1010-1019, 2008
4 H. Jeon, "A clock embedded differential signaling (CEDSTM) for the next generation TFT-LCD applications" 975-978, 2009
5 K. -L. J. Wong, "A 27-mW 3. 6-Gb/s I/O transceiver" 39 (39): 602-612, 2004