반도체 패키지의 열변형 해석 시 유한요소 모델의 영향

다국어 초록 (Multilingual Abstract)

The reliability concerns of solder interconnections in flip chip PBGA packages are produced mainly by the mismatch of coefficient of thermal expansion(CTE) between the module and PCB. Finite element analysis has been employed extensively to simulate thermal loading for solder joint reliability and deformation of packages in electronic packages. The objective of this paper is to study the thermo-mechanical behavior of FC-PBGA package assemblies subjected to temperature change, with an emphasis on the effect of the finite element model, material models and temperature conditions. Numerical results are compared with the experimental results by using moire interferometry. Result shows that the bending displacements of the chip calculated by the finite element analysis with viscoplastic material model is in good agreement with those by moire inteferometry.

목차 (Table of Contents)

• Abstract
• 1. 서론
• 2. 유한요소 해석
• 3. 결과 및 토의
• 4. 결론
• 후기
• 참고문헌

참고문헌 (Reference)

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