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https://www.riss.kr/link?id=O16080685
2000년
-
0278-0070
1937-4151
SCI;SCIE;SCOPUS
학술저널
IEEE TRANSACTIONS ON COMPUTER AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
969-980 [※수록면이 p5 이하이면, Review, Columns, Editor's Note, Abstract 등일 경우가 있습니다.]
0
상세조회0
다운로드
A Computer Simulation Model for Simulating Distortion in FET Resistors
Computer-Aided Analysis of On-Chip Interconnects Near Semiconductor Substrate for High-Speed VLSI
Crosstalk-Driven Interconnect Optimization by Simultaneous Gate and Wire Sizing
Generating Synthetic Benchmark Circuits for Evaluating CAD Tools