SIMOX SOI 構造의 製造 및 特性分析 = Fabrication and characterization of SIMOX SOI structures

다국어 초록 (Multilingual Abstract)

SIMOX SOI structures are fabricated under various conditions and characterized electrically and physically to establish a characterization technology which is a key to the fabrication of high quality SIMOX SOI. The first subject of this work is to investigate the annealing condition dependence of the characteristics of SIMOX SOI. SOI structures are fabricated under various annealing conditions. The microstructure and the behavior of oxygen atoms during annealing process are investigated through AES/TEM analysis. The crystalline quality of the structures is examined through transmission electron diffraction experiments. The electrical properties are measured by SRP and MOS C-V technique. Reduction of oxygen concentration in the SOI layer is dominated by the behavior of oxygen precipitates. The electrical properties of the structures are influenced by oxygen precipitates which initiate to desolve at the annealing temperature of 1250℃. The electrical properties of the structure are improved with the dissolution of oxygen precipitates. Dielectric and interface properties are also improved after annealing at high temperature. The second subject of the work is the examination of possibility of oxygen does reduction required for SIMOX fabrication. Characteristics of the SIMOX SOI formed by subcritical oxygen dose is investigated using physical methods such as AES, XPS and TEM as well as electrical methods such as SRP and C-V. Although oxygen dose is 0.4×10^(18)/㎠ which corresponds to below one third of critical dose, a continuous buried oxide layer can be obtained while no oxygen precipitates and crystal defects are found in the SOI layer. In the case of the dose of 0.8×10^(18)/㎠, there are numerous Si precipitates in the buried oxide layer. But dielectric properties of the buried oxide layer is fairly good. The third subject is electrical characterization of SOI structures. A method for characterization of both SOI/buried oxide and buried oxide/substrate interfaces is suggested. The C-V analysis of SIS capacitors is based upon conventional MOS C-V theory. SIS capacitors are fabricated using SIMOX SOI wafers. Complete depletion of the SOI layer is prevented by increasing either SOI layer thickness through epitaxial growth or doping concentration of the layer. High and low frequency C-V measurements are conducted using conventional method. Parameters such as buried oxide thickness, doping concentration, interface trap density are determined by the measurements.

목차 (Table of Contents)

• 目次 = i
• I. 序論 = 1
• 1. SOI(silicon-on-insulator) 技術 = 1
• 2. SIMOX(separation by implanted oxygen) SOI 技術 = 5
• 3. SIMOX SOI의 硏究動向 = 8
• 4. 硏究內容 = 11
• II. 熱處理條件에 따른 SIMOX SOI의 特性 = 12
• 1. 槪要 = 12
• 2. 酸素이온注入에 의한 SOI 構造의 形成機構 = 13
• 3. 試片의 製造와 特性分析 = 23
• 4. 熱處理條件이 SIMOX SOI의 特性에 미치는 影響 = 26
• 5. 要約 = 47
• III. 小量의 酸素이온注入으로 製造된 SIMOX SOI의 特性 = 48
• 1. 槪要 = 48
• 2. 試片의 製造와 特性分析 = 49
• 3. 小量의 酸素이온注入으로 製造된 SOI의 特性 = 51
• 4. 要約 = 63
• IV. SIS 構造의 C-V 解析에 의한 SOI 特性分析 = 64
• 1. 槪要 = 64
• 2. SIS 構造 C-V 特性의 理論的 解析 = 65
• 3. SIS 커패시터의 製造와 C-V 測定 = 77
• 4. SIS 構造의 C-V 解析과 SOI 特性分析 = 81
• 5. 要約 = 91
• V. 結論 = 92
• 參考 文獻 = 94
• (Abstract) = 106