In this paper, we proposed a new digital phase-locked loop (DPLL) design method using minimum variance finite impulse response filter (MVFIRF). To design a DPLL, LMI condition has been used to derive the gain of MVFIRF based DPLL. The proposed DPLL ha...
In this paper, we proposed a new digital phase-locked loop (DPLL) design method using minimum variance finite impulse response filter (MVFIRF). To design a DPLL, LMI condition has been used to derive the gain of MVFIRF based DPLL. The proposed DPLL has more robust performance against incorrect nosie information. The robust performance against incorrect information has been shown via numerical example.