In this paper, a design method is proposed for an efficient FFT processor for local area data communication adopting OFDM(Orthogonal Frequency Division Multiplexing) modulation scheme. OFDM is one of the most promising digital modulation techniques fo...
In this paper, a design method is proposed for an efficient FFT processor for local area data communication adopting OFDM(Orthogonal Frequency Division Multiplexing) modulation scheme. OFDM is one of the most promising digital modulation techniques for multhipath fading channels. One of the key components to implement the high data rate OFDM system is to design the efficient IFFT and FFT blocks. In the proposed design method pipelined architecture is utilized which is necessary for higher data rate and sequential data processing. This architecture is combined with Radix-2³ algorithm to provide the enhanced area/power efficient design which is suitable for local area data communication.