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https://www.riss.kr/link?id=O37942517
2001년
eng
VLSI ; IEEE ; test technology ; VTS
1093-0167
2375-1053
학술저널
IEEE VLSI TEST SYMPOSIUM
375-379 [※수록면이 p5 이하이면, Review, Columns, Editor's Note, Abstract 등일 경우가 있습니다.]
0769511228; 0769511236; 0769511244
VLSI test symposium
19th
Marina Del Rey, CA
2001; Apr
0
상세조회0
다운로드
Test Generation for Maximizing Ground Bounce for Internal Circuitry with Reconvergent Fan-outs
Precedence-Based, Preemptive, and Power-Constrained Test Scheduling for System-on-a-Chip
An On-Chip Short-Time Interval Measurement Technique for Testing High-Speed Communication Links
Tools for the Characterization of Bipolar CML Testability