Electronic devices based-on the integration of mixed-dimensional van der waals heterostructures

다국어 초록 (Multilingual Abstract)

Physical device scaling of traditional silicon metal-oxide-semiconductor field-effect transistors (MOSFETs) has driven progress in computing for decades; however, continued scaling is become increasingly difficult. Consequently, there is a need for minimiture the integrated circuit beyond-silicon nanotechnologies. Besides, ever since the discovery of carbon nanotube (CNT), graphene and transition metal dichalcogenide (TMD), 1D-2D layered materials as the platforms for exploiting the extraordinary properties in the low-dimensional physics. Owing to their small diameter (CNT), thin, flat and a dangling-bond-free surface, which will interact each other through van der Waals (vdW) forces and promise an order-of-magnitude improvement in device performance. However, it remains a challenge to produce the vertical configuration of mix-dimensional heterostructures over large-scale areas with high quality. In particular, graphene electrode cannot perform as below 10 nm scaled electrodes due to the band gap opening in graphene nanoribbon. Together, graphene electrode in vertical-field-effect-transistor (VFET), which possess the screening effect by the bottom gate-induced modulation, resulting to low on/off current ratio. On the other hand, CNT is commercialized materials with small range of diameter (1-2 nm), which is not only increasing the number of devices in the integrated circuit but also can enhance the device performance owing to low screening effect. In this dissertation, the systematically study the screening effect on VFET was discussed, while also highlight the improving the device scaling limits of integration circuits.
In Chapter 1, 1D-2D materials structures and properties are briefly reviewed. In chapter 2, the screening effect was systematically study with CNT (1D)/MoS2 (2D) VFET. In this topic, a screening-engineered CNT network/MoS2/metal heterojunction CNT-VFET is fabricated for an efficient gate modulation independent of the drain voltage. In Chapter 3, for further increasing the number of devices in future integrated circuit, we proposed and demonstrated the vertical memristor by constructing the CNT (1D) and single molecule (0D). In chapter 4, we systematically study the screening effect on the interface-doped between ZnO /others oxide heterojunctions. Finally, the perspectives from my personal point of view in vdW heterostructure are covered by the Chapter 5.

목차 (Table of Contents)

• Chapter I. INTRODUCTION 1
• I.1. Structures and properties of single-walled carbon nanotubes 1
• I.2. Structures and properties of two-dimensional layered materials 4
• I.2.1. Graphene 6
• I.2.2. Transition metal dichalcogenides 7
• I.2.3. Hexagonal boron nitride 8
• I.3. van der Waals heterostructure 9
• I.4. Integration of mix-dimensional heterostructure 12
• I.5. Scope and motivation of the dissertation 14
• Chapter II. EFFICIENT GATE MODULATION IN SCREENING ENGINEERED MOS2/SWCNT-NETWORK HETEROJUNCTION VERTICAL FIELD-EFFECT TRANSISTORS 16
• II.1. Background 18
• II.2. Experiment 22
• II.2.1. Device fabrication 22
• II.2.2. Device characterization 24
• II.3. Results and Discussions 30
• II.3.1. Simulation of the electrostatic screening effects of the Gr-VFET and CNTVFET 30
• II.3.2. Electrical characteristic in comparison of Gr-VFET and CNT-VFET 33
• II.3.3. Transfer characteristics of Gr-VFET and CNT-VFET along graphene and CNT current variation. 36
• II.3.4. CNT-VFET with the difference of CNT density and AuCl3 doping 38
• II.3.5. Electrical characteristics for CNT-VFET, barristor and planar transistor in comparison. 38
• II.3.6. Calculation of the mobility of the VFET 39
• II.3.7. Calculation of the charge distribution of the VFET 41
• II.3.8. Comparison of the on/off current ratios of the CNT-VFET and Gr-VFET 48
• II.4. Conclusions 49
• Chapter III. SINGLE-MOLECULAR ELECTRICAL SYNAPSE DEVICES USING MULTICROSS-JUNCTIONS OF SINGLE-WALLED CARBON NANOTUBES 51
• III.1. Background 53
• III.2. Experiment 58
• III.2.1. Synthesis of aligned-SWCNT by CVD method 58
• III.2.2. Synthesis of single molecule by chemical method 59
• III.2.3. Device fabrication 61
• III.2.4. Characterizations 62
• III.3. Results and Discussions 63
• III.3.1. SWCNTs characterizations 63
• III.3.2. Device structure 68
• III.3.3. Multi-cross junction CNTB-SM-CNTT device 70
• III.3.4. Photo-switching operation of CNTB-SM-CNTT junction device 72
• III.3.5. Electrical synapse performance of CNTB-SM-CNTT devices 74
• III.3.6. Single molecular rectification of CNTB-SM (ferrocenylpyrene)-CNTT 80
• III.4. Conclusions 81
• Chapter IV. TUNING THE INHOMOGENEOUS CHARGE TRANSPORT IN ZNO INTERFACES FOR ULTRAHIGH ON/OFF RATIO TOP-GATE FIELD-EFFECT TRANSISTOR ARRAYS 83
• IV.1. Background 85
• IV.2. Experiment 88
• IV.2.1. Device fabrication 88
• IV.2.2. Characterizations 90
• IV.3. Results and Discussions 92
• IV.3.1. Device structure 92
• IV.3.2. Effect of passivation layer on ZnO film 93
• IV.3.3. Effect of buffer layer (BL) on hybrid device 101
• IV.3.4. Buffer layer of h-BN on hybrid device 111
• IV.4. Conclusions 112
• Chapter V. Summary and outlook 114
• V.1. Summary 114
• V.2. Outlook 115
• References 117