An In-Band Noise Filtering 32-tap FIR-Embedded ΔΣ Digital Fractional-N PLL

다국어 초록 (Multilingual Abstract)

This paper presents a 1.9-GHz digital ΔΣ fractional-N PLL with a finite impulse response (FIR) filter embedded for noise suppression. The proposed digital implementation of FIR provides a simple method of increasing the number of taps without complicated calculation for gain matching. This work demonstrates 32 tap FIR filtering for the first time and successfully filtered the in-band phase noise generated from delta-sigma modulator (DSM). Design considerations are also addressed to find the optimum number of taps when the resolution of time-to-digital converter (TDC) is given. The PLL, fabricated in 0.11-μm CMOS, achieves a well-regulated in-band phase noise of less than -100 dBc/Hz for the entire range inside the bandwidth of 3 MHz. Compared with the conventional dual-modulus division, the proposed PLL shows an overall noise suppression of about 15dB both at in-band and out-of-band region.

참고문헌 (Reference)

1 X. Yu, "An FIR-embedded noise filtering method for ΔΣ fractional-N PLL clock generators" 44 (44): 2426-2436, 2009

2 R. B. Staszewski, "All-Digital Frequency Synthesizer in Deep-Submicron CMOS" Wiley 2006

3 X. Yu, "A ΔΣ fractional-N synthesizer with customized noise shaping for WCDMA/HSDPA applications" 44 (44): 2193-2200, 2009

4 M. Zanuso, "A wideband 3.6 GHz digital ΔΣ fractional-N PLL with phase interpolation divider and digital spur cancellation" 46 (46): 627-638, 2011

5 M. H. Perrott, "A modeling approach for Σ-Δ fractional-N frequency synthesizers allowing straightforward noise analysis" 37 (37): 1028-1038, 2002

6 Anil Kavala, "A PVT-compensated 2.2 to 3.0 GHz Digitally Controlled Oscillator for All-Digital PLL" 대한전자공학회 14 (14): 484-494, 2014

7 D.-W. Jee, "A FIR-embedded phase interpolator based noise filtering for widebandwidth fractional-N PLL" 48 (48): 2795-2804, 2013

8 I.-T. Lee, "A 6-GHz alldigital fractional-N frequency synthesizer using FIR-embedded noise filtering technique" 59 (59): 267-271, 2012

9 D.-W. Jee, "A 2GHz fractional-N digital PLL with 1b noise shaping ΔΣ TDC" 47 (47): 875-883, 2012

10 M. Kondou, "A 0.3 mm2 90-to-770 MHz fractiona- N synthesizer for a digital TV tuner" 248-249, 2010

11 D.-W. Jee, "A 0.1-fref BW 1 GHz fractional-N PLL with FIRembedded phase-interpolator-based noise filtering" 94-95, 2011