1 M. Sinha, "Tuning the schottky barrier height of nickel silicide on p-silicon by aluminum segregation" 92 : 222114-, 2008
2 Zhun Zhong, "Study of Thermal Stability of Ni Silicide using Ni-V Alloy" 한국전기전자재료학회 9 (9): 47-51, 2008
3 S. P. Murarka, "Self-aligned silicides or metals for very large integrated circuit applications" B4 : 1325-, 1986
4 G. P. Lousberg, "Schottky barrier height lowering by an increase of the substrate doping in PtSi Schottky barrier source/drain FETs" 28 (28): 123-, 2007
5 J. M. Larson, "Overview and status of metal S/D Schottky-barrier MOSFET technology" 53 : 1048-, 2006
6 K. Goto, "Optimization of salicide process for sub 0.1um CMOS device" 119-, 1994
7 황빈봉, "Nano-scale CMOS를 위한 Ni-germano Silicide의 열 안정성 연구" 한국전기전자재료학회 17 (17): 1149-1155, 2004
8 K. N. Tu, "Low schottky barrier of rare-earth silicide on n-Si" 38 (38): 626-, 1981
9 H. S. Wong, "Low schottky barrier height for silicides on n-type Si(100)by interfacial selenium segregation during silicidation" 93 : 072103-, 2008
10 J. G. Yun, "Highly thermal robust NiSi for nanoscale MOSFETs utilizing a novel hydrogen plasma immersion ion implantation and Ni-Co-TiN tri-layer" 26 (26): 90-, 2005
1 M. Sinha, "Tuning the schottky barrier height of nickel silicide on p-silicon by aluminum segregation" 92 : 222114-, 2008
2 Zhun Zhong, "Study of Thermal Stability of Ni Silicide using Ni-V Alloy" 한국전기전자재료학회 9 (9): 47-51, 2008
3 S. P. Murarka, "Self-aligned silicides or metals for very large integrated circuit applications" B4 : 1325-, 1986
4 G. P. Lousberg, "Schottky barrier height lowering by an increase of the substrate doping in PtSi Schottky barrier source/drain FETs" 28 (28): 123-, 2007
5 J. M. Larson, "Overview and status of metal S/D Schottky-barrier MOSFET technology" 53 : 1048-, 2006
6 K. Goto, "Optimization of salicide process for sub 0.1um CMOS device" 119-, 1994
7 황빈봉, "Nano-scale CMOS를 위한 Ni-germano Silicide의 열 안정성 연구" 한국전기전자재료학회 17 (17): 1149-1155, 2004
8 K. N. Tu, "Low schottky barrier of rare-earth silicide on n-Si" 38 (38): 626-, 1981
9 H. S. Wong, "Low schottky barrier height for silicides on n-type Si(100)by interfacial selenium segregation during silicidation" 93 : 072103-, 2008
10 J. G. Yun, "Highly thermal robust NiSi for nanoscale MOSFETs utilizing a novel hydrogen plasma immersion ion implantation and Ni-Co-TiN tri-layer" 26 (26): 90-, 2005
11 H. S. Wong, "Effective schottky barrier height reduction using Sulfur or Selenium at the NiSi/n-Si(100)interface for low resistance contacts" 28 (28): -1102, 2007
12 M. Jang, "Characterization of erbium-silicided schottky diode junction" 26 : 354-, 2005
13 T. Shibata, "An optimally designed process for submicron MOSFETs" 647-, 1981
14 T. Morimoto, "A NiSi salicide technology for advanced logic device" 653-, 1991