Optimal Power Allocation for Multiprogrammed Workloads on Single-chip Heterogeneous Processors

다국어 초록 (Multilingual Abstract)

Due to the growing requirements of performance and energy efficiency, processor manufacturers now integrate both CPU and GPU cores onto a single chip and support fine-grain dynamic voltage/frequency scaling (DVFS). To effectively utilize abundant hardware resources, the CPU and the GPU on a single-chip heterogeneous processor (SCHP) are required to execute multiple programs simultaneously via both space and time sharing. Since the performance is primarily limited by the available power budget, it is crucial to optimally allocate it across the CPU and the GPU by considering both workload characteristics and evaluation metrics. This paper advocates adaptive, workload-aware power allocation for multiprogrammed workloads on an SCHP with fine-grain DVFS capabilities. Using a detailed cycle-level SCHP simulator, we first demonstrate that workload-aware power allocation can improve throughput and energy efficiency by an average of 12% and 18%, respectively, over workload-oblivious uniform power allocation for 11 multiprogrammed workloads. We also propose two efficient run-time algorithms that find an optimal voltage/frequency setting for the two metrics (i.e., throughput and energy efficiency), which allow the SCHP to reach the optimal or near-optimal setting within four iterations.

목차 (Table of Contents)

• Abstract 3
• 1. Introduction 5
• 2. Motivation 7
• 2.1 Single-chip Heterogeneous Processors 7
• 2.2 Opportunities for Multiprogrammed Workloads 9
• 3. Methodology 11
• 3.1 Baseline Processor Model 11
• 3.2 Workloads 16
• 4. Evaluation 17
• 4.1 Optimal Power Allocation 18
• 4.2 Case Studies 20
• 5. Run-time Algorithms 24
• 5.1 Algorithm to optimize IPS 25
• 5.2 Algorithm to optimize IPS/Watt 29
• 6. Related Work 30
• 7. Conclusion 33
• References 36
• Korean Abstract 40