1 R. Sabelka, "The State of the Art in Interconnect Simula tion" 6-11, 2000.
2 K. L. Shepard, "Return-Limited Inductances: A Practical Approach to On-Chip Inductance Extraction" 19 (19): 425-436, 2000.
3 J.-P. Berenger, "Perfectly matched layer for the FDTD solution of wave-structure interaction problems" 44 (44): 110-117, 1996.
4 K. S. Yee, "Numerical solution of initial boun dary value problems involving Maxwell's equa tions in isotropic media" 14 (14): 302-307, 1966.
5 C.-P. Chen, "Generalized FDTD-ADI: An Uncon ditionally Stable Full-wave Maxwell's Equations Solver for VLSI interconnect Modeling" 156-164, 2000.
6 M. W. Beattie, "Bounds for BEM Capacitance Extraction" 133-136, 1997.
7 U. Choundhury,, "Automatic Generation of Analytical Models for Interconnect Capacitances" 14 (14): 470-480, 1995.
1 R. Sabelka, "The State of the Art in Interconnect Simula tion" 6-11, 2000.
2 K. L. Shepard, "Return-Limited Inductances: A Practical Approach to On-Chip Inductance Extraction" 19 (19): 425-436, 2000.
3 J.-P. Berenger, "Perfectly matched layer for the FDTD solution of wave-structure interaction problems" 44 (44): 110-117, 1996.
4 K. S. Yee, "Numerical solution of initial boun dary value problems involving Maxwell's equa tions in isotropic media" 14 (14): 302-307, 1966.
5 C.-P. Chen, "Generalized FDTD-ADI: An Uncon ditionally Stable Full-wave Maxwell's Equations Solver for VLSI interconnect Modeling" 156-164, 2000.
6 M. W. Beattie, "Bounds for BEM Capacitance Extraction" 133-136, 1997.
7 U. Choundhury,, "Automatic Generation of Analytical Models for Interconnect Capacitances" 14 (14): 470-480, 1995.